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author | Xiantao Zhang <xiantao.zhang@intel.com> | 2009-04-21 14:05:21 +0800 |
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committer | Avi Kivity <avi@redhat.com> | 2009-04-21 13:00:20 +0300 |
commit | 9dc99a28236161a5a1b4c58f1e9c4ec6179cb976 (patch) | |
tree | e748995395c114a729747d4c6a4295c99ee91d44 /cache-utils.h | |
parent | Fix option_rom_setup_reset address (diff) | |
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Sync idcache after emualted DMA operations for ia64
ia64 depends on platform provides synced idcache after DMA operation.
For virtual dma operations in qemu, it also need to provide similar
machanism.
Signed-off-by: Xiantao Zhang <xiantao.zhang@intel.com>
Signed-off-by: Avi Kivity <avi@redhat.com>
Diffstat (limited to 'cache-utils.h')
-rw-r--r-- | cache-utils.h | 14 |
1 files changed, 14 insertions, 0 deletions
diff --git a/cache-utils.h b/cache-utils.h index b45fde44e..2a07fbde3 100644 --- a/cache-utils.h +++ b/cache-utils.h @@ -33,8 +33,22 @@ static inline void flush_icache_range(unsigned long start, unsigned long stop) asm volatile ("sync" : : : "memory"); asm volatile ("isync" : : : "memory"); } +#define qemu_sync_idcache flush_icache_range +#else +#ifdef __ia64__ +static inline void qemu_sync_idcache(unsigned long start, unsigned long stop) +{ + while (start < stop) { + asm volatile ("fc %0" :: "r"(start)); + start += 32; + } + asm volatile (";;sync.i;;srlz.i;;"); +} #else +static inline void qemu_sync_idcache(unsigned long start, unsigned long stop) {} +#endif + #define qemu_cache_utils_init(envp) do { (void) (envp); } while (0) #endif |