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authorNathan Froyd <froydnj@codesourcery.com>2010-02-20 10:19:09 -0800
committerAurelien Jarno <aurelien@aurel32.net>2010-02-23 18:27:54 +0100
commit9f59ddcc4fb4cf4f96b2751d4170596c8df19280 (patch)
tree1ce1952cb18c9b10ae2b56feed0e2f101aa7738a /target-mips
parenttcg/mips: fix crash in tcg_out_qemu_ld() (diff)
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target-mips: fix CpU exception for coprocessor 0
When we signal a CpU exception for coprocessor 0, we should indicate that it's for coprocessor 0 instead of coprocessor 1. Signed-off-by: Nathan Froyd <froydnj@codesourcery.com> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net> (cherry picked from commit 13f160cebd0778113ba8d251aea297286b1666cb)
Diffstat (limited to 'target-mips')
-rw-r--r--target-mips/translate.c2
1 files changed, 1 insertions, 1 deletions
diff --git a/target-mips/translate.c b/target-mips/translate.c
index f756ab9db..bf983821a 100644
--- a/target-mips/translate.c
+++ b/target-mips/translate.c
@@ -821,7 +821,7 @@ static inline void gen_op_addr_add (DisasContext *ctx, TCGv ret, TCGv arg0, TCGv
static inline void check_cp0_enabled(DisasContext *ctx)
{
if (unlikely(!(ctx->hflags & MIPS_HFLAG_CP0)))
- generate_exception_err(ctx, EXCP_CpU, 1);
+ generate_exception_err(ctx, EXCP_CpU, 0);
}
static inline void check_cp1_enabled(DisasContext *ctx)