old

(Portage version: 2.1.4_rc4)

18 files changed, 0 insertions, 1876 deletions

diff --git a/sys-devel/gcc/files/3.3.3/gcc-3.3.3-norelro.patch b/sys-devel/gcc/files/3.3.3/gcc-3.3.3-norelro.patch
deleted file mode 100644
index 8da6d30168a5..000000000000
--- a/sys-devel/gcc/files/3.3.3/gcc-3.3.3-norelro.patch
+++ /dev/null
@@ -1,11 +0,0 @@
---- gcc-3.3.3/gcc/pie-ssp-chain.h.mps	2004-06-14 22:18:40.000000000 +0200
-+++ gcc-3.3.3/gcc/pie-ssp-chain.h	2004-06-14 22:19:04.000000000 +0200
-@@ -85,7 +85,7 @@
- #endif
- 
- #ifdef HAVE_LD_PIE
--#define LINK_PIE_SPEC STD_PIE_TRIGGER( LNK_CHAIN_EXCLUDE( PIE_CHAIN_EXCLUDE(LINKSEC_PIE_LNK) ) ) " " OPP_PIE_TRIGGER() " " STD_RELRO_TRIGGER(LINKSEC_RELRO_LNK) " " OPP_RELRO_TRIGGER() " " STD_NOW_TRIGGER(LINKSEC_NOW_LNK) " " OPP_NOW_TRIGGER()
-+#define LINK_PIE_SPEC STD_PIE_TRIGGER( LNK_CHAIN_EXCLUDE( PIE_CHAIN_EXCLUDE(LINKSEC_PIE_LNK) ) ) " " OPP_PIE_TRIGGER()
- #else
- #error we need ld w/ -pie support
- #endif
diff --git a/sys-devel/gcc/files/3.3.3/gcc-3.3.3-uclibc-add-ssp.patch b/sys-devel/gcc/files/3.3.3/gcc-3.3.3-uclibc-add-ssp.patch
deleted file mode 100644
index 8e52412e3611..000000000000
--- a/sys-devel/gcc/files/3.3.3/gcc-3.3.3-uclibc-add-ssp.patch
+++ /dev/null
@@ -1,11 +0,0 @@
---- gcc-3.3.3/gcc/config/t-linux-uclibc.mps	Mon Apr 26 14:51:40 2004
-+++ gcc-3.3.3/gcc/config/t-linux-uclibc	Mon Apr 26 14:51:53 2004
-@@ -6,7 +6,7 @@
- # Compile crtbeginS.o and crtendS.o with pic.
- CRTSTUFF_T_CFLAGS_S = $(CRTSTUFF_T_CFLAGS) -fPIC
- # Compile libgcc2.a with pic.
--TARGET_LIBGCC2_CFLAGS = -fPIC
-+TARGET_LIBGCC2_CFLAGS = -fPIC -DHAVE_SYSLOG
- 
- # Override t-slibgcc-elf-ver to export some libgcc symbols with
- # the symbol versions that glibc used.
diff --git a/sys-devel/gcc/files/3.4.0/gcc-3.4.0-cc1-no-stack-protector.patch b/sys-devel/gcc/files/3.4.0/gcc-3.4.0-cc1-no-stack-protector.patch
deleted file mode 100644
index 72bce28a552b..000000000000
--- a/sys-devel/gcc/files/3.4.0/gcc-3.4.0-cc1-no-stack-protector.patch
+++ /dev/null
@@ -1,11 +0,0 @@
---- gcc/Makefile.in.mps	2004-06-01 22:06:17.000000000 +0200
-+++ gcc/Makefile.in	2004-06-01 22:06:56.000000000 +0200
-@@ -1845,7 +1845,7 @@ $(out_object_file): $(out_file) $(CONFIG
-    output.h $(INSN_ATTR_H) $(SYSTEM_H) toplev.h $(TARGET_H) libfuncs.h \
-    $(TARGET_DEF_H) function.h sched-int.h $(TM_P_H) $(EXPR_H) $(OPTABS_H) \
-    langhooks.h
--	$(CC) -c $(ALL_CFLAGS) $(ALL_CPPFLAGS) $(INCLUDES) \
-+	$(CC) -c $(ALL_CFLAGS) -fno-stack-protector $(ALL_CPPFLAGS) $(INCLUDES) \
- 		$(out_file) $(OUTPUT_OPTION)
- 
- # Build auxiliary files that support ecoff format.
diff --git a/sys-devel/gcc/files/3.4.0/gcc34-reiser4-fix.patch b/sys-devel/gcc/files/3.4.0/gcc34-reiser4-fix.patch
deleted file mode 100644
index f43be66b1677..000000000000
--- a/sys-devel/gcc/files/3.4.0/gcc34-reiser4-fix.patch
+++ /dev/null
@@ -1,22 +0,0 @@
---- gcc/cppfiles.c	2004/06/02 09:00:36	1.1
-+++ gcc/cppfiles.c	2004/06/02 09:20:49
-@@ -329,8 +329,17 @@ find_file_in_dir (cpp_reader *pfile, _cp
- 
-   if (file->err_no != ENOENT)
-     {
--      open_file_failed (pfile, file);
--      return true;
-+      if (file->err_no == EACCES)
-+        {
-+          /* make EACCES non-fatal to fix bug ?? (glibc 2.3.3 on reiser4) */
-+          cpp_errno (pfile, CPP_DL_WARNING, file->path);
-+          return false;
-+        }
-+      else
-+        {
-+          open_file_failed (pfile, file);
-+          return true;
-+        }
-     }
- 
-   free (path);
diff --git a/sys-devel/gcc/files/3.4.1/gcc-3.4.1-glibc-is-native.patch b/sys-devel/gcc/files/3.4.1/gcc-3.4.1-glibc-is-native.patch
deleted file mode 100644
index 8bd8ca9d279a..000000000000
--- a/sys-devel/gcc/files/3.4.1/gcc-3.4.1-glibc-is-native.patch
+++ /dev/null
@@ -1,19 +0,0 @@
---- gcc-3.4.1.old/libstdc++-v3/configure.ac	2004-08-11 09:17:51.817618280 -0400
-+++ gcc-3.4.1/libstdc++-v3/configure.ac	2004-08-11 09:30:10.708289824 -0400
-@@ -39,13 +39,9 @@
- # Handy for debugging:
- #AC_MSG_NOTICE($build / $host / $target / $host_alias / $target_alias); sleep 5
- 
--if test "$build" != "$host"; then
--  # We are being configured with some form of cross compiler.
--  GLIBCXX_IS_NATIVE=false
--  GCC_NO_EXECUTABLES
--else
--  GLIBCXX_IS_NATIVE=true
--fi
-+# it seems this gcc always gets this check wrong for multilib on gentoo, so
-+# lets force it to the value it should be.
-+GLIBCXX_IS_NATIVE=true
- 
- # Sets up automake.  Must come after AC_CANONICAL_SYSTEM.  Each of the
- # following is magically included in AUTOMAKE_OPTIONS in each Makefile.am.
diff --git a/sys-devel/gcc/files/3.4.2/810-arm-bigendian-uclibc.patch b/sys-devel/gcc/files/3.4.2/810-arm-bigendian-uclibc.patch
deleted file mode 100644
index a4d87e231741..000000000000
--- a/sys-devel/gcc/files/3.4.2/810-arm-bigendian-uclibc.patch
+++ /dev/null
@@ -1,27 +0,0 @@
-diff -urN gcc-3.4.1-dist/gcc/config/arm/linux-elf.h gcc-3.4.1/gcc/config/arm/linux-elf.h
---- gcc-3.4.1-dist/gcc/config/arm/linux-elf.h	2004-08-16 16:08:18.000000000 -0500
-+++ gcc-3.4.1/gcc/config/arm/linux-elf.h	2004-08-16 16:06:24.000000000 -0500
-@@ -107,7 +107,7 @@
-    %{rdynamic:-export-dynamic} \
-    %{!dynamic-linker:-dynamic-linker /lib/ld-uClibc.so.0} \
-    -X \
--   %{mbig-endian:-EB}" \
-+   %{mbig-endian:-EB} %{mlittle-endian:-EL}" \
-    SUBTARGET_EXTRA_LINK_SPEC
- #else
- #define LINK_SPEC "%{h*} %{version:-v} \
-diff -urN gcc-3.4.1-dist/gcc/config.gcc gcc-3.4.1/gcc/config.gcc
---- gcc-3.4.1-dist/gcc/config.gcc	2004-08-16 16:08:18.000000000 -0500
-+++ gcc-3.4.1/gcc/config.gcc	2004-08-16 16:03:25.000000000 -0500
-@@ -666,6 +666,11 @@
- 	;;
- arm*-*-linux-uclibc*)		# ARM GNU/Linux with ELF - uClibc
- 	tm_file="dbxelf.h elfos.h linux.h arm/elf.h  arm/linux-gas.h arm/linux-elf.h arm/aout.h arm/arm.h"
-+	case $target in
-+	arm*b-*)
-+		tm_defines="TARGET_BIG_ENDIAN_DEFAULT=1 $tm_defines"
-+		;;
-+	esac
- 	tmake_file="t-slibgcc-elf-ver t-linux-uclibc arm/t-linux"
- 	extra_parts="crtbegin.o crtbeginS.o crtend.o crtendS.o"
- 	gnu_ld=yes
diff --git a/sys-devel/gcc/files/3.4.2/gcc-3.4.2-mips-ip28_cache_barriers-v2.patch b/sys-devel/gcc/files/3.4.2/gcc-3.4.2-mips-ip28_cache_barriers-v2.patch
deleted file mode 100644
index d91c9f2738d5..000000000000
--- a/sys-devel/gcc/files/3.4.2/gcc-3.4.2-mips-ip28_cache_barriers-v2.patch
+++ /dev/null
@@ -1,458 +0,0 @@
---- gcc-3.4.2/gcc/config/mips/mips.h	Thu Jul 15 02:42:47 2004
-+++ gcc-3.4.2/gcc/config/mips/mips.h	Sat Sep 18 00:41:48 2004
-@@ -122,6 +122,7 @@
- extern const char *mips_isa_string;	/* for -mips{1,2,3,4} */
- extern const char *mips_abi_string;	/* for -mabi={32,n32,64} */
- extern const char *mips_cache_flush_func;/* for -mflush-func= and -mno-flush-func */
-+extern const char *mips_ip28_cache_barrier;/* for -mip28-cache-barrier */
- extern int mips_string_length;		/* length of strings for mips16 */
- extern const struct mips_cpu_info mips_cpu_info_table[];
- extern const struct mips_cpu_info *mips_arch_info;
-@@ -333,6 +334,7 @@
- #define TARGET_MIPS9000             (mips_arch == PROCESSOR_R9000)
- #define TARGET_SB1                  (mips_arch == PROCESSOR_SB1)
- #define TARGET_SR71K                (mips_arch == PROCESSOR_SR71000)
-+#define TARGET_IP28                 (mips_ip28_cache_barrier != 0)
- 
- /* Scheduling target defines.  */
- #define TUNE_MIPS3000               (mips_tune == PROCESSOR_R3000)
-@@ -752,6 +754,8 @@
-       N_("Don't call any cache flush functions"), 0},			\
-   { "flush-func=", &mips_cache_flush_func,				\
-       N_("Specify cache flush function"), 0},				\
-+  { "ip28-cache-barrier", &mips_ip28_cache_barrier,			\
-+      N_("Generate special cache barriers for SGI Indigo2 R10k"), 0},	\
- }
- 
- /* This is meant to be redefined in the host dependent files.  */
-@@ -3448,3 +3452,11 @@
- 	" TEXT_SECTION_ASM_OP);
- #endif
- #endif
-+
-+#define ASM_OUTPUT_R10K_CACHE_BARRIER(STREAM)		\
-+  fprintf (STREAM, "\tcache 0x14,0($sp)\t%s Cache Barrier\n", ASM_COMMENT_START)
-+
-+/*
-+ * mips.h	Thu Jul 15 02:42:47 2004
-+ * mips.h	Fri Sep 17 23:18:19 2004	ip28
-+ */
---- gcc-3.4.2/gcc/config/mips/mips.c	Wed Jul  7 21:21:10 2004
-+++ gcc-3.4.2/gcc/config/mips/mips.c	Fri Sep 17 23:33:44 2004
-@@ -502,6 +502,11 @@
- 
- const char *mips_cache_flush_func = CACHE_FLUSH_FUNC;
- 
-+/* Nonzero means generate special cache barriers to inhibit speculative
-+   stores which might endanger cache coherency or reference invalid
-+   addresses (especially on SGI's Indigo2 R10k (IP28)).  */
-+const char *mips_ip28_cache_barrier;
-+
- /* If TRUE, we split addresses into their high and low parts in the RTL.  */
- int mips_split_addresses;
- 
-@@ -9676,3 +9681,7 @@
- #endif /* TARGET_IRIX */
- 
- #include "gt-mips.h"
-+/*
-+ * mips.c	Wed Jul  7 21:21:10 2004
-+ * mips.c	Fri Sep 17 23:25:53 2004	ip28
-+ */
---- gcc-3.4.2/gcc/final.c	Sun Jan 18 23:39:57 2004
-+++ gcc-3.4.2/gcc/final.c	Thu Apr  7 00:00:05 2005
-@@ -146,6 +146,13 @@
- 
- static rtx last_ignored_compare = 0;
- 
-+/* Flag indicating this insn is the start of a new basic block.  */
-+
-+#define NEW_BLOCK_LABEL  1
-+#define NEW_BLOCK_BRANCH 2
-+
-+static int new_block = NEW_BLOCK_LABEL;
-+
- /* Assign a unique number to each insn that is output.
-    This can be used to generate unique local labels.  */
- 
-@@ -235,6 +242,7 @@
- #ifdef HAVE_ATTR_length
- static int align_fuzz (rtx, rtx, int, unsigned);
- #endif
-+static int output_store_cache_barrier (FILE *, rtx);
- 
- /* Initialize data in final at the beginning of a compilation.  */
- 
-@@ -1505,6 +1513,7 @@
-   int seen = 0;
- 
-   last_ignored_compare = 0;
-+  new_block = NEW_BLOCK_LABEL;
- 
- #ifdef SDB_DEBUGGING_INFO
-   /* When producing SDB debugging info, delete troublesome line number
-@@ -1571,6 +1580,7 @@
- 
-       insn = final_scan_insn (insn, file, optimize, prescan, 0, &seen);
-     }
-+  new_block = 0;
- }
- 
- const char *
-@@ -1851,6 +1861,7 @@
- #endif
-       if (prescan > 0)
- 	break;
-+      new_block = NEW_BLOCK_LABEL;
- 
-       if (LABEL_NAME (insn))
- 	(*debug_hooks->label) (insn);
-@@ -2009,6 +2020,26 @@
- 
- 	    break;
- 	  }
-+
-+#ifdef TARGET_IP28
-+	if (new_block)
-+	  {
-+	    /* .reorder: not really in the branch-delay-slot. */
-+	    if (! set_noreorder)
-+	      new_block = NEW_BLOCK_LABEL;
-+
-+	    if (new_block == NEW_BLOCK_BRANCH)
-+	      /* Not yet, only *after* the branch-delay-slot ! */
-+	      new_block = NEW_BLOCK_LABEL;
-+	    else
-+	      {
-+	        if (TARGET_IP28)
-+	          output_store_cache_barrier (file, insn);
-+	        new_block = 0;
-+	      }
-+	  }
-+#endif
-+
- 	/* Output this line note if it is the first or the last line
- 	   note in a row.  */
- 	if (notice_source_line (insn))
-@@ -2132,8 +2163,29 @@
- 	       clobbered by the function.  */
- 	    if (GET_CODE (XVECEXP (body, 0, 0)) == CALL_INSN)
- 	      {
-+#ifdef TARGET_IP28
-+	        if (TARGET_IP28)
-+	          new_block = NEW_BLOCK_LABEL;
-+#endif
- 		CC_STATUS_INIT;
- 	      }
-+#ifdef TARGET_IP28
-+	    /* Following a conditional branch sequence, we have a new basic
-+	       block.  */
-+	    if (TARGET_IP28)
-+	      {
-+		rtx insn = XVECEXP (body, 0, 0);
-+		rtx body = PATTERN (insn);
-+
-+		if ((GET_CODE (insn) == JUMP_INSN && GET_CODE (body) == SET
-+		     && GET_CODE (SET_SRC (body)) != LABEL_REF)
-+		    || (GET_CODE (insn) == JUMP_INSN
-+			&& GET_CODE (body) == PARALLEL
-+			&& GET_CODE (XVECEXP (body, 0, 0)) == SET
-+			&& GET_CODE (SET_SRC (XVECEXP (body, 0, 0))) != LABEL_REF))
-+		  new_block = NEW_BLOCK_LABEL;
-+	      }
-+#endif
- 	    break;
- 	  }
- 
-@@ -2188,6 +2240,20 @@
- 	  }
- #endif
- 
-+#ifdef TARGET_IP28
-+	/* Following a conditional branch, we have a new basic block.
-+	   But if we are inside a sequence, the new block starts after the
-+	   last insn of the sequence.  */
-+	if (TARGET_IP28 && final_sequence == 0
-+	    && (GET_CODE (insn) == CALL_INSN
-+	        || (GET_CODE (insn) == JUMP_INSN && GET_CODE (body) == SET
-+	            && GET_CODE (SET_SRC (body)) != LABEL_REF)
-+	        || (GET_CODE (insn) == JUMP_INSN && GET_CODE (body) == PARALLEL
-+	            && GET_CODE (XVECEXP (body, 0, 0)) == SET
-+	            && GET_CODE (SET_SRC (XVECEXP (body, 0, 0))) != LABEL_REF)))
-+	      new_block = NEW_BLOCK_BRANCH;
-+#endif
-+
- #ifndef STACK_REGS
- 	/* Don't bother outputting obvious no-ops, even without -O.
- 	   This optimization is fast and doesn't interfere with debugging.
-@@ -2402,6 +2468,7 @@
- 
- 	    if (prev_nonnote_insn (insn) != last_ignored_compare)
- 	      abort ();
-+	    new_block = 0;
- 
- 	    /* We have already processed the notes between the setter and
- 	       the user.  Make sure we don't process them again, this is
-@@ -2435,6 +2502,7 @@
- 	    abort ();
- #endif
- 
-+	    new_block = 0;
- 	    return new;
- 	  }
- 
-@@ -3866,3 +3934,254 @@
-       symbol_queue_size = 0;
-     }
- }
-+
-+
-+#ifdef TARGET_IP28
-+
-+/* Check, whether an instruction is a possibly harmful store instruction,
-+   i.e. a store which might cause damage, if speculatively executed. */
-+
-+static rtx
-+find_mem_expr (rtx xexp)
-+{
-+  if (xexp)
-+    {
-+      const char *fmt;
-+      int i, j, lng;
-+      rtx x;
-+      RTX_CODE code = GET_CODE (xexp);
-+
-+      if (MEM == code)
-+        return xexp;
-+
-+      fmt = GET_RTX_FORMAT (code);
-+      lng = GET_RTX_LENGTH (code);
-+
-+      for (i = 0; i < lng; ++i)
-+        switch (fmt[i])
-+          {
-+          case 'e':
-+            x = find_mem_expr (XEXP (xexp, i));
-+            if (x)
-+              return x;
-+            break;
-+          case 'E':
-+            if (XVEC (xexp, i))
-+              for (j = 0; j < XVECLEN (xexp, i); ++j)
-+                {
-+                  x = find_mem_expr (XVECEXP (xexp, i, j));
-+                  if (x)
-+                    return x;
-+                }
-+          }
-+    }
-+  return 0;
-+}
-+
-+static int
-+check_mem_expr (rtx memx)
-+{
-+  /* Check the expression `memx' (with type GET_CODE(memx) == MEM)
-+     for the most common stackpointer-addressing modes.
-+     It's not worthwile to avoid a cache barrier also on the
-+     remaining unfrequently used modes.  */
-+  rtx x = XEXP (memx, 0);
-+  switch (GET_CODE (x))
-+    {
-+    case REG:
-+      if (REGNO (x) == STACK_POINTER_REGNUM)
-+        return 0;
-+    default:
-+      break;
-+    case PLUS: case MINUS: /* always `SP + const' ? */
-+      if (GET_CODE (XEXP (x, 1)) == REG
-+          && REGNO (XEXP (x, 1)) == STACK_POINTER_REGNUM)
-+        return 0;
-+    case NEG: case SIGN_EXTEND: case ZERO_EXTEND:
-+      if (GET_CODE (XEXP (x, 0)) == REG
-+          && REGNO (XEXP (x, 0)) == STACK_POINTER_REGNUM)
-+        return 0;
-+    }
-+
-+  /* Stores/Loads to/from constant addresses can be considered
-+     harmless, since:
-+     1)  the address is always valid, even when taken speculatively.
-+     2a) the location is (hopefully) never used as a dma-target, thus
-+         there is no danger of cache-inconsistency.
-+     2b) uncached loads/stores are guaranteed to be non-speculative. */
-+  if ( CONSTANT_P(x) )
-+    return 0;
-+
-+  return 1;
-+}
-+
-+/* inline */ static int
-+check_pattern_for_store (rtx body)
-+{
-+  /* Check for (set (mem:M (non_stackpointer_address) ...)).  Here we
-+     assume, that addressing with the stackpointer accesses neither
-+     uncached-aliased nor invalid memory.  (May be, this applies to the
-+     global pointer and frame pointer also, but its saver not to assume
-+     it. And probably it's not worthwile to regard these registers)
-+
-+     Speculative loads from invalid addresses also cause bus errors...
-+     So check for (set (reg:M ...) (mem:M (non_stackpointer_address)))
-+     too. */
-+
-+  if (body && GET_CODE (body) == SET)
-+    {
-+      rtx x = find_mem_expr (body);
-+
-+      if (x && check_mem_expr (x))
-+        return 1;
-+    }
-+  return 0;
-+}
-+
-+static int
-+check_insn_for_store (int state, rtx insn)
-+{
-+  /* Check for (ins (set (mem:M (dangerous_address)) ...)) or end of the
-+     current basic block.
-+     Criteria to recognize end-of/next basic-block are reduplicated here
-+     from final_scan_insn. */
-+
-+  rtx body;
-+  int code;
-+
-+  if (INSN_DELETED_P (insn))
-+    return 0;
-+
-+  switch (code = GET_CODE (insn))
-+    {
-+    case CODE_LABEL:
-+      return -1;
-+    case CALL_INSN:
-+    case JUMP_INSN:
-+    case INSN:
-+      body = PATTERN (insn);
-+      if (GET_CODE (body) == SEQUENCE)
-+        {
-+          /* A delayed-branch sequence */
-+          rtx ins0 = XVECEXP (body, 0, 0);
-+          rtx pat0 = PATTERN (ins0);
-+          int i;
-+          for (i = 0; i < XVECLEN (body, 0); i++)
-+            {
-+              rtx insq = XVECEXP (body, 0, i);
-+              if (! INSN_DELETED_P (insq))
-+                {
-+                  int j = check_insn_for_store (state|1, insq);
-+                  if (j)
-+                    return j;
-+                }
-+            }
-+          /* Following a conditional branch sequence, we have a new
-+             basic block.  */
-+          if (GET_CODE (ins0) == JUMP_INSN)
-+            if ((GET_CODE (pat0) == SET
-+                 && GET_CODE (SET_SRC (pat0)) != LABEL_REF)
-+                || (GET_CODE (pat0) == PARALLEL
-+                    && GET_CODE (XVECEXP (pat0, 0, 0)) == SET
-+                    && GET_CODE (SET_SRC (XVECEXP (pat0, 0, 0))) != LABEL_REF))
-+              return -1;
-+          /* Handle a call sequence like a conditional branch sequence */
-+          if (GET_CODE (ins0) == CALL_INSN)
-+            return -1;
-+          break;
-+        }
-+      if (GET_CODE (body) == PARALLEL)
-+        {
-+          int i;
-+          for (i = 0; i < XVECLEN (body, 0); i++)
-+            if (check_pattern_for_store (XVECEXP (body, 0, i)))
-+              return 1;
-+        }
-+      /* Now, only a `simple' INSN or JUMP_INSN remains to be checked. */
-+      if (code == INSN)
-+        {
-+          /* Since we don't know, what's inside, we must take inline
-+             assembly to be dangerous */
-+          if (GET_CODE (body) == ASM_INPUT)
-+            return 1;
-+
-+          if (check_pattern_for_store (body))
-+            return 1;
-+        }
-+      /* Handle a CALL_INSN instruction like a conditional branch */
-+      if (code == JUMP_INSN || code == CALL_INSN)
-+        {
-+          /* Following a conditional branch, we have a new basic block. */
-+          int ckds = 0;
-+          if (code == CALL_INSN)
-+            ckds = 1;
-+          else
-+            {
-+              code = GET_CODE (body);
-+              if ((code == SET
-+                   && GET_CODE (SET_SRC (body)) != LABEL_REF)
-+                  || (code == PARALLEL
-+                      && GET_CODE (XVECEXP (body, 0, 0)) == SET
-+                      && GET_CODE (SET_SRC (XVECEXP (body, 0, 0))) != LABEL_REF))
-+                ckds = 1;
-+            }
-+          if (ckds)
-+            {
-+              /* But check insn(s) in delay-slot first.  If we could know in
-+                 advance that this jump is in `.reorder' mode, where gas will
-+                 insert a `nop' into the delay-slot, we could skip this test.
-+                 Since we don't know, always assume `.noreorder', sometimes
-+                 emitting a cache-barrier, that isn't needed.  */
-+              /* But if we are here recursively, already checking a (pseudo-)
-+                 delay-slot, we are done.  */
-+              if ( !(state & 2) )
-+                for (insn = NEXT_INSN (insn); insn; insn = NEXT_INSN (insn))
-+                  switch (GET_CODE (insn))
-+                    {
-+                    case INSN:
-+                      if (check_insn_for_store (state|1|2, insn) > 0)
-+                        return 1;
-+                    case CODE_LABEL:
-+                    case CALL_INSN:
-+                    case JUMP_INSN:
-+                      return -1;
-+                    default:
-+                      /* skip NOTE,... */;
-+                    }
-+              return -1;
-+            }
-+        }
-+      /*break*/
-+    }
-+  return 0;
-+}
-+
-+/* Scan a basic block, starting with `insn', for a possibly harmful store
-+   instruction.  If found, output a cache barrier at the start of this
-+   block.  */
-+
-+static int
-+output_store_cache_barrier (FILE *file, rtx insn)
-+{
-+  for (; insn; insn = NEXT_INSN (insn))
-+    {
-+      int found = check_insn_for_store (0, insn);
-+      if (found < 0)
-+        break;
-+      if (found > 0)
-+        {
-+          /* found critical store instruction */
-+          ASM_OUTPUT_R10K_CACHE_BARRIER(file);
-+          return 1;
-+        }
-+    }
-+  fprintf(file, "\t%s Cache Barrier omitted.\n", ASM_COMMENT_START);
-+  return 0;
-+}
-+
-+#endif /* TARGET_IP28 */
-+
-+/*
-+ * final.c	Sun Jan 18 23:39:57 2004
-+ * final.c	Sat Sep 18 00:23:34 2004	ip28
-+ */
diff --git a/sys-devel/gcc/files/3.4.2/gcc-3.4.2-mips-ip28_cache_barriers-v3-ip32r10k.patch b/sys-devel/gcc/files/3.4.2/gcc-3.4.2-mips-ip28_cache_barriers-v3-ip32r10k.patch
deleted file mode 100644
index 6eb47a05a504..000000000000
--- a/sys-devel/gcc/files/3.4.2/gcc-3.4.2-mips-ip28_cache_barriers-v3-ip32r10k.patch
+++ /dev/null
@@ -1,517 +0,0 @@
---- gcc-3.4.2/gcc/config/mips/mips-protos.h	Wed Jul  7 21:21:10 2004
-+++ gcc-3.4.2/gcc/config/mips/mips-protos.h	Fri Sep 23 18:11:24 2005
-@@ -154,4 +154,13 @@
- extern const char *current_section_name (void);
- extern unsigned int current_section_flags (void);
- 
-+#ifdef TARGET_IP28
-+extern int ip28_set_new_block_label (void);
-+extern int ip28_set_new_block_branch (void);
-+extern int ip28_set_new_block_done (void);
-+extern int ip28_handle_new_block_start (FILE *file, rtx insn);
-+extern int ip28_check_code_default_sequence (FILE *file, rtx body);
-+extern int ip28_check_code_real_insn (FILE *file, rtx insn, int final_sequence);
-+#endif
-+
- #endif /* ! GCC_MIPS_PROTOS_H */
---- gcc-3.4.2/gcc/config/mips/mips.h	Thu Jul 15 02:42:47 2004
-+++ gcc-3.4.2/gcc/config/mips/mips.h	Sat Sep 18 00:41:48 2004
-@@ -122,6 +122,7 @@
- extern const char *mips_isa_string;	/* for -mips{1,2,3,4} */
- extern const char *mips_abi_string;	/* for -mabi={32,n32,64} */
- extern const char *mips_cache_flush_func;/* for -mflush-func= and -mno-flush-func */
-+extern const char *mips_ip28_cache_barrier;/* for -mip28-cache-barrier */
- extern int mips_string_length;		/* length of strings for mips16 */
- extern const struct mips_cpu_info mips_cpu_info_table[];
- extern const struct mips_cpu_info *mips_arch_info;
-@@ -333,6 +334,7 @@
- #define TARGET_MIPS9000             (mips_arch == PROCESSOR_R9000)
- #define TARGET_SB1                  (mips_arch == PROCESSOR_SB1)
- #define TARGET_SR71K                (mips_arch == PROCESSOR_SR71000)
-+#define TARGET_IP28                 (mips_ip28_cache_barrier != 0)
- 
- /* Scheduling target defines.  */
- #define TUNE_MIPS3000               (mips_tune == PROCESSOR_R3000)
-@@ -752,6 +754,8 @@
-       N_("Don't call any cache flush functions"), 0},			\
-   { "flush-func=", &mips_cache_flush_func,				\
-       N_("Specify cache flush function"), 0},				\
-+  { "ip28-cache-barrier", &mips_ip28_cache_barrier,			\
-+      N_("Generate special cache barriers for SGI Indigo2 R10k"), 0},	\
- }
- 
- /* This is meant to be redefined in the host dependent files.  */
-@@ -3448,3 +3452,7 @@
- 	" TEXT_SECTION_ASM_OP);
- #endif
- #endif
-+
-+#define ASM_OUTPUT_R10K_CACHE_BARRIER(STREAM)		\
-+  fprintf (STREAM, "\tcache 0x14,0($sp)\t%s Cache Barrier\n", ASM_COMMENT_START)
-+
---- gcc-3.4.2/gcc/config/mips/mips.c	Wed Jul  7 21:21:10 2004
-+++ gcc-3.4.2/gcc/config/mips/mips.c	Fri Sep 23 15:14:50 2005
-@@ -502,6 +502,11 @@
- 
- const char *mips_cache_flush_func = CACHE_FLUSH_FUNC;
- 
-+/* Nonzero means generate special cache barriers to inhibit speculative
-+   stores which might endanger cache coherency or reference invalid
-+   addresses (especially on SGI's Indigo2 R10k (IP28)).  */
-+const char *mips_ip28_cache_barrier;
-+
- /* If TRUE, we split addresses into their high and low parts in the RTL.  */
- int mips_split_addresses;
- 
-@@ -9673,6 +9678,355 @@
-   return flags;
- }
- 
-+
- #endif /* TARGET_IRIX */
-+
-+#ifdef TARGET_IP28
-+
-+/* Flag indicating this insn is the start of a new basic block.  */
-+
-+#define NEW_BLOCK_LABEL  1
-+#define NEW_BLOCK_BRANCH 2
-+
-+static int new_block = NEW_BLOCK_LABEL;
-+
-+/* Check, whether an instruction is a possibly harmful store instruction,
-+   i.e. a store which might cause damage, if speculatively executed. */
-+
-+static rtx
-+find_mem_expr (rtx xexp)
-+{
-+  if (xexp)
-+    {
-+      const char *fmt;
-+      int i, j, lng;
-+      rtx x;
-+      RTX_CODE code = GET_CODE (xexp);
-+
-+      if (MEM == code)
-+        return xexp;
-+
-+      fmt = GET_RTX_FORMAT (code);
-+      lng = GET_RTX_LENGTH (code);
-+
-+      for (i = 0; i < lng; ++i)
-+        switch (fmt[i])
-+          {
-+          case 'e':
-+            x = find_mem_expr (XEXP (xexp, i));
-+            if (x)
-+              return x;
-+            break;
-+          case 'E':
-+            if (XVEC (xexp, i))
-+              for (j = 0; j < XVECLEN (xexp, i); ++j)
-+                {
-+                  x = find_mem_expr (XVECEXP (xexp, i, j));
-+                  if (x)
-+                    return x;
-+                }
-+          }
-+    }
-+  return 0;
-+}
-+
-+static int
-+check_mem_expr (rtx memx)
-+{
-+  /* Check the expression `memx' (with type GET_CODE(memx) == MEM)
-+     for the most common stackpointer-addressing modes.
-+     It's not worthwile to avoid a cache barrier also on the
-+     remaining unfrequently used modes.  */
-+  rtx x = XEXP (memx, 0);
-+  switch (GET_CODE (x))
-+    {
-+    case REG:
-+      if (REGNO (x) == STACK_POINTER_REGNUM)
-+        return 0;
-+    default:
-+      break;
-+    case PLUS: case MINUS: /* always `SP + const' ? */
-+      if (GET_CODE (XEXP (x, 1)) == REG
-+          && REGNO (XEXP (x, 1)) == STACK_POINTER_REGNUM)
-+        return 0;
-+    case NEG: case SIGN_EXTEND: case ZERO_EXTEND:
-+      if (GET_CODE (XEXP (x, 0)) == REG
-+          && REGNO (XEXP (x, 0)) == STACK_POINTER_REGNUM)
-+        return 0;
-+    }
-+
-+  /* Stores/Loads to/from constant addresses can be considered
-+     harmless, since:
-+     1)  the address is always valid, even when taken speculatively.
-+     2a) the location is (hopefully) never used as a dma-target, thus
-+         there is no danger of cache-inconsistency.
-+     2b) uncached loads/stores are guaranteed to be non-speculative. */
-+  if ( CONSTANT_P(x) )
-+    return 0;
-+
-+  return 1;
-+}
-+
-+/* inline */ static int
-+check_pattern_for_store (rtx body)
-+{
-+  /* Check for (set (mem:M (non_stackpointer_address) ...)).  Here we
-+     assume, that addressing with the stackpointer accesses neither
-+     uncached-aliased nor invalid memory.  (May be, this applies to the
-+     global pointer and frame pointer also, but its saver not to assume
-+     it. And probably it's not worthwile to regard these registers)
-+
-+     Speculative loads from invalid addresses also cause bus errors...
-+     So check for (set (reg:M ...) (mem:M (non_stackpointer_address)))
-+     too. */
-+
-+  if (body && GET_CODE (body) == SET)
-+    {
-+      rtx x = find_mem_expr (body);
-+
-+      if (x && check_mem_expr (x))
-+        return 1;
-+    }
-+  return 0;
-+}
-+
-+static int
-+check_insn_for_store (int state, rtx insn)
-+{
-+  /* Check for (ins (set (mem:M (dangerous_address)) ...)) or end of the
-+     current basic block.
-+     Criteria to recognize end-of/next basic-block are reduplicated here
-+     from final_scan_insn. */
-+
-+  rtx body;
-+  int code;
-+
-+  if (INSN_DELETED_P (insn))
-+    return 0;
-+
-+  switch (code = GET_CODE (insn))
-+    {
-+    case CODE_LABEL:
-+      return -1;
-+    case CALL_INSN:
-+    case JUMP_INSN:
-+    case INSN:
-+      body = PATTERN (insn);
-+      if (GET_CODE (body) == SEQUENCE)
-+        {
-+          /* A delayed-branch sequence */
-+          rtx ins0 = XVECEXP (body, 0, 0);
-+          rtx pat0 = PATTERN (ins0);
-+          int i;
-+          for (i = 0; i < XVECLEN (body, 0); i++)
-+            {
-+              rtx insq = XVECEXP (body, 0, i);
-+              if (! INSN_DELETED_P (insq))
-+                {
-+                  int j = check_insn_for_store (state|1, insq);
-+                  if (j)
-+                    return j;
-+                }
-+            }
-+          /* Following a conditional branch sequence, we have a new
-+             basic block.  */
-+          if (GET_CODE (ins0) == JUMP_INSN)
-+            if ((GET_CODE (pat0) == SET
-+                 && GET_CODE (SET_SRC (pat0)) != LABEL_REF)
-+                || (GET_CODE (pat0) == PARALLEL
-+                    && GET_CODE (XVECEXP (pat0, 0, 0)) == SET
-+                    && GET_CODE (SET_SRC (XVECEXP (pat0, 0, 0))) != LABEL_REF))
-+              return -1;
-+          /* Handle a call sequence like a conditional branch sequence */
-+          if (GET_CODE (ins0) == CALL_INSN)
-+            return -1;
-+          break;
-+        }
-+      if (GET_CODE (body) == PARALLEL)
-+        {
-+          int i;
-+          for (i = 0; i < XVECLEN (body, 0); i++)
-+            if (check_pattern_for_store (XVECEXP (body, 0, i)))
-+              return 1;
-+        }
-+      /* Now, only a `simple' INSN or JUMP_INSN remains to be checked. */
-+      if (code == INSN)
-+        {
-+          /* Since we don't know, what's inside, we must take inline
-+             assembly to be dangerous */
-+          if (GET_CODE (body) == ASM_INPUT)
-+            return 1;
-+
-+          if (check_pattern_for_store (body))
-+            return 1;
-+        }
-+      /* Handle a CALL_INSN instruction like a conditional branch */
-+      if (code == JUMP_INSN || code == CALL_INSN)
-+        {
-+          /* Following a conditional branch, we have a new basic block. */
-+          int ckds = 0;
-+          if (code == CALL_INSN)
-+            ckds = 1;
-+          else
-+            {
-+              code = GET_CODE (body);
-+              if ((code == SET
-+                   && GET_CODE (SET_SRC (body)) != LABEL_REF)
-+                  || (code == PARALLEL
-+                      && GET_CODE (XVECEXP (body, 0, 0)) == SET
-+                      && GET_CODE (SET_SRC (XVECEXP (body, 0, 0))) != LABEL_REF))
-+                ckds = 1;
-+            }
-+          if (ckds)
-+            {
-+              /* But check insn(s) in delay-slot first.  If we could know in
-+                 advance that this jump is in `.reorder' mode, where gas will
-+                 insert a `nop' into the delay-slot, we could skip this test.
-+                 Since we don't know, always assume `.noreorder', sometimes
-+                 emitting a cache-barrier, that isn't needed.  */
-+              /* But if we are here recursively, already checking a (pseudo-)
-+                 delay-slot, we are done.  */
-+              if ( !(state & 2) )
-+                for (insn = NEXT_INSN (insn); insn; insn = NEXT_INSN (insn))
-+                  switch (GET_CODE (insn))
-+                    {
-+                    case INSN:
-+                      if (check_insn_for_store (state|1|2, insn) > 0)
-+                        return 1;
-+                    case CODE_LABEL:
-+                    case CALL_INSN:
-+                    case JUMP_INSN:
-+                      return -1;
-+                    default:
-+                      /* skip NOTE,... */;
-+                    }
-+              return -1;
-+            }
-+        }
-+      /*break*/
-+    }
-+  return 0;
-+}
-+
-+/* Scan a basic block, starting with `insn', for a possibly harmful store
-+   instruction.  If found, output a cache barrier at the start of this
-+   block.  */
-+
-+static int
-+output_store_cache_barrier (FILE *file, rtx insn)
-+{
-+  for (; insn; insn = NEXT_INSN (insn))
-+    {
-+      int found = check_insn_for_store (0, insn);
-+      if (found < 0)
-+        break;
-+      if (found > 0)
-+        {
-+          /* found critical store instruction */
-+          ASM_OUTPUT_R10K_CACHE_BARRIER(file);
-+          return 1;
-+        }
-+    }
-+  fprintf(file, "\t%s Cache Barrier omitted.\n", ASM_COMMENT_START);
-+  return 0;
-+}
-+
-+
-+/*
-+ * here follows the interface for gcc/final.c
-+ */
-+
-+int
-+ip28_set_new_block_label (void)
-+{
-+    int i = new_block;
-+    new_block = NEW_BLOCK_LABEL;
-+    return i;
-+}
-+
-+int
-+ip28_set_new_block_branch (void)
-+{
-+    int i = new_block;
-+    new_block = NEW_BLOCK_BRANCH;
-+    return i;
-+}
-+
-+int
-+ip28_set_new_block_done (void)
-+{
-+    int i = new_block;
-+    new_block = 0;
-+    return i;
-+}
-+
-+int
-+ip28_handle_new_block_start (FILE *file, rtx insn)
-+{
-+    if (new_block)
-+      {
-+        /* .reorder: not really in the branch-delay-slot. */
-+        if (! set_noreorder)
-+          new_block = NEW_BLOCK_LABEL;
-+    
-+        if (new_block == NEW_BLOCK_BRANCH)
-+          /* Not yet, only *after* the branch-delay-slot ! */
-+          new_block = NEW_BLOCK_LABEL;
-+        else
-+          {
-+            if (TARGET_IP28)
-+              output_store_cache_barrier (file, insn);
-+            new_block = 0;
-+          }
-+      }
-+    return new_block;
-+}
-+
-+int
-+ip28_check_code_default_sequence (FILE *file, rtx body)
-+{
-+    (void)file;
-+
-+    if (TARGET_IP28)
-+      {
-+    	rtx insn = XVECEXP (body, 0, 0);
-+    	rtx patt = PATTERN (insn);
-+
-+        if (GET_CODE (insn) == CALL_INSN)
-+            new_block = NEW_BLOCK_LABEL;
-+
-+        /* Following a conditional branch sequence, we have a new basic
-+           block.  */
-+    	if ((GET_CODE (insn) == JUMP_INSN && GET_CODE (patt) == SET
-+    	     && GET_CODE (SET_SRC (patt)) != LABEL_REF)
-+    	    || (GET_CODE (insn) == JUMP_INSN
-+    		&& GET_CODE (patt) == PARALLEL
-+    		&& GET_CODE (XVECEXP (patt, 0, 0)) == SET
-+    		&& GET_CODE (SET_SRC (XVECEXP (patt, 0, 0))) != LABEL_REF))
-+    	  new_block = NEW_BLOCK_LABEL;
-+      }
-+    return new_block;
-+}
-+
-+int
-+ip28_check_code_real_insn (FILE *file, rtx insn, int final_sequence)
-+{
-+    rtx body = PATTERN (insn);
-+
-+    /* Following a conditional branch, we have a new basic block.
-+       But if we are inside a sequence, the new block starts after the
-+       last insn of the sequence.  */
-+    if (TARGET_IP28 && final_sequence == 0
-+        && (GET_CODE (insn) == CALL_INSN
-+            || (GET_CODE (insn) == JUMP_INSN && GET_CODE (body) == SET
-+                && GET_CODE (SET_SRC (body)) != LABEL_REF)
-+            || (GET_CODE (insn) == JUMP_INSN && GET_CODE (body) == PARALLEL
-+                && GET_CODE (XVECEXP (body, 0, 0)) == SET
-+                && GET_CODE (SET_SRC (XVECEXP (body, 0, 0))) != LABEL_REF)))
-+          new_block = NEW_BLOCK_BRANCH;
-+    return new_block;
-+}
-+
-+#endif /* TARGET_IP28 */
- 
- #include "gt-mips.h"
---- gcc-3.4.2/gcc/final.c	Sun Jan 18 23:39:57 2004
-+++ gcc-3.4.2/gcc/final.c	Fri Sep 23 15:11:38 2005
-@@ -116,6 +116,16 @@
- #define SEEN_NOTE	2
- #define SEEN_EMITTED	4
- 
-+/* suitable for SGI Indigo2 R10k (IP28) kernel-code ? */
-+#ifndef TARGET_IP28
-+#define ip28_set_new_block_label()
-+#define ip28_set_new_block_branch()
-+#define ip28_set_new_block_done()
-+#define ip28_handle_new_block_start(file, insn)
-+#define ip28_check_code_default_sequence(file, body)
-+#define ip28_check_code_real_insn(file, insn, final_sequence)
-+#endif
-+
- /* Last insn processed by final_scan_insn.  */
- static rtx debug_insn;
- rtx current_output_insn;
-@@ -1505,6 +1515,7 @@
-   int seen = 0;
- 
-   last_ignored_compare = 0;
-+  ip28_set_new_block_label();
- 
- #ifdef SDB_DEBUGGING_INFO
-   /* When producing SDB debugging info, delete troublesome line number
-@@ -1571,6 +1582,7 @@
- 
-       insn = final_scan_insn (insn, file, optimize, prescan, 0, &seen);
-     }
-+  ip28_set_new_block_done();
- }
- 
- const char *
-@@ -1851,6 +1863,7 @@
- #endif
-       if (prescan > 0)
- 	break;
-+      ip28_set_new_block_label();
- 
-       if (LABEL_NAME (insn))
- 	(*debug_hooks->label) (insn);
-@@ -2009,6 +2022,9 @@
- 
- 	    break;
- 	  }
-+
-+	ip28_handle_new_block_start(file, insn);
-+
- 	/* Output this line note if it is the first or the last line
- 	   note in a row.  */
- 	if (notice_source_line (insn))
-@@ -2134,9 +2150,13 @@
- 	      {
- 		CC_STATUS_INIT;
- 	      }
-+
-+            /* Following a conditional branch sequence, we have a new basic
-+               block.  */
-+	    ip28_check_code_default_sequence (file, body);
- 	    break;
- 	  }
--
-+	
- 	/* We have a real machine instruction as rtl.  */
- 
- 	body = PATTERN (insn);
-@@ -2188,6 +2208,11 @@
- 	  }
- #endif
- 
-+	/* Following a conditional branch, we have a new basic block.
-+	   But if we are inside a sequence, the new block starts after the
-+	   last insn of the sequence.  */
-+	ip28_check_code_real_insn (file, insn, final_sequence);
-+
- #ifndef STACK_REGS
- 	/* Don't bother outputting obvious no-ops, even without -O.
- 	   This optimization is fast and doesn't interfere with debugging.
-@@ -2402,6 +2427,7 @@
- 
- 	    if (prev_nonnote_insn (insn) != last_ignored_compare)
- 	      abort ();
-+	    ip28_set_new_block_done();
- 
- 	    /* We have already processed the notes between the setter and
- 	       the user.  Make sure we don't process them again, this is
-@@ -2435,6 +2461,7 @@
- 	    abort ();
- #endif
- 
-+	    ip28_set_new_block_done();
- 	    return new;
- 	  }
- 
diff --git a/sys-devel/gcc/files/3.4.2/gcc-3.4.2-mips-ip28_cache_barriers-v3.patch b/sys-devel/gcc/files/3.4.2/gcc-3.4.2-mips-ip28_cache_barriers-v3.patch
deleted file mode 100644
index 5c3e738e2b59..000000000000
--- a/sys-devel/gcc/files/3.4.2/gcc-3.4.2-mips-ip28_cache_barriers-v3.patch
+++ /dev/null
@@ -1,517 +0,0 @@
---- gcc-3.4.2/gcc/config/mips/mips-protos.h	Wed Jul  7 21:21:10 2004
-+++ gcc-3.4.2/gcc/config/mips/mips-protos.h	Fri Sep 23 18:11:24 2005
-@@ -154,4 +154,13 @@
- extern const char *current_section_name (void);
- extern unsigned int current_section_flags (void);
- 
-+#ifdef TARGET_IP28
-+extern int ip28_set_new_block_label (void);
-+extern int ip28_set_new_block_branch (void);
-+extern int ip28_set_new_block_done (void);
-+extern int ip28_handle_new_block_start (FILE *file, rtx insn);
-+extern int ip28_check_code_default_sequence (FILE *file, rtx body);
-+extern int ip28_check_code_real_insn (FILE *file, rtx insn, int final_sequence);
-+#endif
-+
- #endif /* ! GCC_MIPS_PROTOS_H */
---- gcc-3.4.2/gcc/config/mips/mips.h	Thu Jul 15 02:42:47 2004
-+++ gcc-3.4.2/gcc/config/mips/mips.h	Sat Sep 18 00:41:48 2004
-@@ -122,6 +122,7 @@
- extern const char *mips_isa_string;	/* for -mips{1,2,3,4} */
- extern const char *mips_abi_string;	/* for -mabi={32,n32,64} */
- extern const char *mips_cache_flush_func;/* for -mflush-func= and -mno-flush-func */
-+extern const char *mips_ip28_cache_barrier;/* for -mip28-cache-barrier */
- extern int mips_string_length;		/* length of strings for mips16 */
- extern const struct mips_cpu_info mips_cpu_info_table[];
- extern const struct mips_cpu_info *mips_arch_info;
-@@ -333,6 +334,7 @@
- #define TARGET_MIPS9000             (mips_arch == PROCESSOR_R9000)
- #define TARGET_SB1                  (mips_arch == PROCESSOR_SB1)
- #define TARGET_SR71K                (mips_arch == PROCESSOR_SR71000)
-+#define TARGET_IP28                 (mips_ip28_cache_barrier != 0)
- 
- /* Scheduling target defines.  */
- #define TUNE_MIPS3000               (mips_tune == PROCESSOR_R3000)
-@@ -752,6 +754,8 @@
-       N_("Don't call any cache flush functions"), 0},			\
-   { "flush-func=", &mips_cache_flush_func,				\
-       N_("Specify cache flush function"), 0},				\
-+  { "ip28-cache-barrier", &mips_ip28_cache_barrier,			\
-+      N_("Generate special cache barriers for SGI Indigo2 R10k"), 0},	\
- }
- 
- /* This is meant to be redefined in the host dependent files.  */
-@@ -3448,3 +3452,7 @@
- 	" TEXT_SECTION_ASM_OP);
- #endif
- #endif
-+
-+#define ASM_OUTPUT_R10K_CACHE_BARRIER(STREAM)		\
-+  fprintf (STREAM, "\tcache 0x14,0($sp)\t%s Cache Barrier\n", ASM_COMMENT_START)
-+
---- gcc-3.4.2/gcc/config/mips/mips.c	Wed Jul  7 21:21:10 2004
-+++ gcc-3.4.2/gcc/config/mips/mips.c	Fri Sep 23 15:14:50 2005
-@@ -502,6 +502,11 @@
- 
- const char *mips_cache_flush_func = CACHE_FLUSH_FUNC;
- 
-+/* Nonzero means generate special cache barriers to inhibit speculative
-+   stores which might endanger cache coherency or reference invalid
-+   addresses (especially on SGI's Indigo2 R10k (IP28)).  */
-+const char *mips_ip28_cache_barrier;
-+
- /* If TRUE, we split addresses into their high and low parts in the RTL.  */
- int mips_split_addresses;
- 
-@@ -9673,6 +9678,355 @@
-   return flags;
- }
- 
-+
- #endif /* TARGET_IRIX */
-+
-+#ifdef TARGET_IP28
-+
-+/* Flag indicating this insn is the start of a new basic block.  */
-+
-+#define NEW_BLOCK_LABEL  1
-+#define NEW_BLOCK_BRANCH 2
-+
-+static int new_block = NEW_BLOCK_LABEL;
-+
-+/* Check, whether an instruction is a possibly harmful store instruction,
-+   i.e. a store which might cause damage, if speculatively executed. */
-+
-+static rtx
-+find_mem_expr (rtx xexp)
-+{
-+  if (xexp)
-+    {
-+      const char *fmt;
-+      int i, j, lng;
-+      rtx x;
-+      RTX_CODE code = GET_CODE (xexp);
-+
-+      if (MEM == code)
-+        return xexp;
-+
-+      fmt = GET_RTX_FORMAT (code);
-+      lng = GET_RTX_LENGTH (code);
-+
-+      for (i = 0; i < lng; ++i)
-+        switch (fmt[i])
-+          {
-+          case 'e':
-+            x = find_mem_expr (XEXP (xexp, i));
-+            if (x)
-+              return x;
-+            break;
-+          case 'E':
-+            if (XVEC (xexp, i))
-+              for (j = 0; j < XVECLEN (xexp, i); ++j)
-+                {
-+                  x = find_mem_expr (XVECEXP (xexp, i, j));
-+                  if (x)
-+                    return x;
-+                }
-+          }
-+    }
-+  return 0;
-+}
-+
-+static int
-+check_mem_expr (rtx memx)
-+{
-+  /* Check the expression `memx' (with type GET_CODE(memx) == MEM)
-+     for the most common stackpointer-addressing modes.
-+     It's not worthwile to avoid a cache barrier also on the
-+     remaining unfrequently used modes.  */
-+  rtx x = XEXP (memx, 0);
-+  switch (GET_CODE (x))
-+    {
-+    case REG:
-+      if (REGNO (x) == STACK_POINTER_REGNUM)
-+        return 0;
-+    default:
-+      break;
-+    case PLUS: case MINUS: /* always `SP + const' ? */
-+      if (GET_CODE (XEXP (x, 1)) == REG
-+          && REGNO (XEXP (x, 1)) == STACK_POINTER_REGNUM)
-+        return 0;
-+    case NEG: case SIGN_EXTEND: case ZERO_EXTEND:
-+      if (GET_CODE (XEXP (x, 0)) == REG
-+          && REGNO (XEXP (x, 0)) == STACK_POINTER_REGNUM)
-+        return 0;
-+    }
-+
-+  /* Stores/Loads to/from constant addresses can be considered
-+     harmless, since:
-+     1)  the address is always valid, even when taken speculatively.
-+     2a) the location is (hopefully) never used as a dma-target, thus
-+         there is no danger of cache-inconsistency.
-+     2b) uncached loads/stores are guaranteed to be non-speculative. */
-+  if ( CONSTANT_P(x) )
-+    return 0;
-+
-+  return 1;
-+}
-+
-+/* inline */ static int
-+check_pattern_for_store (rtx body)
-+{
-+  /* Check for (set (mem:M (non_stackpointer_address) ...)).  Here we
-+     assume, that addressing with the stackpointer accesses neither
-+     uncached-aliased nor invalid memory.  (May be, this applies to the
-+     global pointer and frame pointer also, but its saver not to assume
-+     it. And probably it's not worthwile to regard these registers)
-+
-+     Speculative loads from invalid addresses also cause bus errors...
-+     So check for (set (reg:M ...) (mem:M (non_stackpointer_address)))
-+     too. */
-+
-+  if (body && GET_CODE (body) == SET)
-+    {
-+      rtx x = find_mem_expr (SET_DEST(body)); /* find_mem_expr (body); */
-+
-+      if (x && check_mem_expr (x))
-+        return 1;
-+    }
-+  return 0;
-+}
-+
-+static int
-+check_insn_for_store (int state, rtx insn)
-+{
-+  /* Check for (ins (set (mem:M (dangerous_address)) ...)) or end of the
-+     current basic block.
-+     Criteria to recognize end-of/next basic-block are reduplicated here
-+     from final_scan_insn. */
-+
-+  rtx body;
-+  int code;
-+
-+  if (INSN_DELETED_P (insn))
-+    return 0;
-+
-+  switch (code = GET_CODE (insn))
-+    {
-+    case CODE_LABEL:
-+      return -1;
-+    case CALL_INSN:
-+    case JUMP_INSN:
-+    case INSN:
-+      body = PATTERN (insn);
-+      if (GET_CODE (body) == SEQUENCE)
-+        {
-+          /* A delayed-branch sequence */
-+          rtx ins0 = XVECEXP (body, 0, 0);
-+          rtx pat0 = PATTERN (ins0);
-+          int i;
-+          for (i = 0; i < XVECLEN (body, 0); i++)
-+            {
-+              rtx insq = XVECEXP (body, 0, i);
-+              if (! INSN_DELETED_P (insq))
-+                {
-+                  int j = check_insn_for_store (state|1, insq);
-+                  if (j)
-+                    return j;
-+                }
-+            }
-+          /* Following a conditional branch sequence, we have a new
-+             basic block.  */
-+          if (GET_CODE (ins0) == JUMP_INSN)
-+            if ((GET_CODE (pat0) == SET
-+                 && GET_CODE (SET_SRC (pat0)) != LABEL_REF)
-+                || (GET_CODE (pat0) == PARALLEL
-+                    && GET_CODE (XVECEXP (pat0, 0, 0)) == SET
-+                    && GET_CODE (SET_SRC (XVECEXP (pat0, 0, 0))) != LABEL_REF))
-+              return -1;
-+          /* Handle a call sequence like a conditional branch sequence */
-+          if (GET_CODE (ins0) == CALL_INSN)
-+            return -1;
-+          break;
-+        }
-+      if (GET_CODE (body) == PARALLEL)
-+        {
-+          int i;
-+          for (i = 0; i < XVECLEN (body, 0); i++)
-+            if (check_pattern_for_store (XVECEXP (body, 0, i)))
-+              return 1;
-+        }
-+      /* Now, only a `simple' INSN or JUMP_INSN remains to be checked. */
-+      if (code == INSN)
-+        {
-+          /* Since we don't know, what's inside, we must take inline
-+             assembly to be dangerous */
-+          if (GET_CODE (body) == ASM_INPUT)
-+            return 1;
-+
-+          if (check_pattern_for_store (body))
-+            return 1;
-+        }
-+      /* Handle a CALL_INSN instruction like a conditional branch */
-+      if (code == JUMP_INSN || code == CALL_INSN)
-+        {
-+          /* Following a conditional branch, we have a new basic block. */
-+          int ckds = 0;
-+          if (code == CALL_INSN)
-+            ckds = 1;
-+          else
-+            {
-+              code = GET_CODE (body);
-+              if ((code == SET
-+                   && GET_CODE (SET_SRC (body)) != LABEL_REF)
-+                  || (code == PARALLEL
-+                      && GET_CODE (XVECEXP (body, 0, 0)) == SET
-+                      && GET_CODE (SET_SRC (XVECEXP (body, 0, 0))) != LABEL_REF))
-+                ckds = 1;
-+            }
-+          if (ckds)
-+            {
-+              /* But check insn(s) in delay-slot first.  If we could know in
-+                 advance that this jump is in `.reorder' mode, where gas will
-+                 insert a `nop' into the delay-slot, we could skip this test.
-+                 Since we don't know, always assume `.noreorder', sometimes
-+                 emitting a cache-barrier, that isn't needed.  */
-+              /* But if we are here recursively, already checking a (pseudo-)
-+                 delay-slot, we are done.  */
-+              if ( !(state & 2) )
-+                for (insn = NEXT_INSN (insn); insn; insn = NEXT_INSN (insn))
-+                  switch (GET_CODE (insn))
-+                    {
-+                    case INSN:
-+                      if (check_insn_for_store (state|1|2, insn) > 0)
-+                        return 1;
-+                    case CODE_LABEL:
-+                    case CALL_INSN:
-+                    case JUMP_INSN:
-+                      return -1;
-+                    default:
-+                      /* skip NOTE,... */;
-+                    }
-+              return -1;
-+            }
-+        }
-+      /*break*/
-+    }
-+  return 0;
-+}
-+
-+/* Scan a basic block, starting with `insn', for a possibly harmful store
-+   instruction.  If found, output a cache barrier at the start of this
-+   block.  */
-+
-+static int
-+output_store_cache_barrier (FILE *file, rtx insn)
-+{
-+  for (; insn; insn = NEXT_INSN (insn))
-+    {
-+      int found = check_insn_for_store (0, insn);
-+      if (found < 0)
-+        break;
-+      if (found > 0)
-+        {
-+          /* found critical store instruction */
-+          ASM_OUTPUT_R10K_CACHE_BARRIER(file);
-+          return 1;
-+        }
-+    }
-+  fprintf(file, "\t%s Cache Barrier omitted.\n", ASM_COMMENT_START);
-+  return 0;
-+}
-+
-+
-+/*
-+ * here follows the interface for gcc/final.c
-+ */
-+
-+int
-+ip28_set_new_block_label (void)
-+{
-+    int i = new_block;
-+    new_block = NEW_BLOCK_LABEL;
-+    return i;
-+}
-+
-+int
-+ip28_set_new_block_branch (void)
-+{
-+    int i = new_block;
-+    new_block = NEW_BLOCK_BRANCH;
-+    return i;
-+}
-+
-+int
-+ip28_set_new_block_done (void)
-+{
-+    int i = new_block;
-+    new_block = 0;
-+    return i;
-+}
-+
-+int
-+ip28_handle_new_block_start (FILE *file, rtx insn)
-+{
-+    if (new_block)
-+      {
-+        /* .reorder: not really in the branch-delay-slot. */
-+        if (! set_noreorder)
-+          new_block = NEW_BLOCK_LABEL;
-+    
-+        if (new_block == NEW_BLOCK_BRANCH)
-+          /* Not yet, only *after* the branch-delay-slot ! */
-+          new_block = NEW_BLOCK_LABEL;
-+        else
-+          {
-+            if (TARGET_IP28)
-+              output_store_cache_barrier (file, insn);
-+            new_block = 0;
-+          }
-+      }
-+    return new_block;
-+}
-+
-+int
-+ip28_check_code_default_sequence (FILE *file, rtx body)
-+{
-+    (void)file;
-+
-+    if (TARGET_IP28)
-+      {
-+    	rtx insn = XVECEXP (body, 0, 0);
-+    	rtx patt = PATTERN (insn);
-+
-+        if (GET_CODE (insn) == CALL_INSN)
-+            new_block = NEW_BLOCK_LABEL;
-+
-+        /* Following a conditional branch sequence, we have a new basic
-+           block.  */
-+    	if ((GET_CODE (insn) == JUMP_INSN && GET_CODE (patt) == SET
-+    	     && GET_CODE (SET_SRC (patt)) != LABEL_REF)
-+    	    || (GET_CODE (insn) == JUMP_INSN
-+    		&& GET_CODE (patt) == PARALLEL
-+    		&& GET_CODE (XVECEXP (patt, 0, 0)) == SET
-+    		&& GET_CODE (SET_SRC (XVECEXP (patt, 0, 0))) != LABEL_REF))
-+    	  new_block = NEW_BLOCK_LABEL;
-+      }
-+    return new_block;
-+}
-+
-+int
-+ip28_check_code_real_insn (FILE *file, rtx insn, int final_sequence)
-+{
-+    rtx body = PATTERN (insn);
-+
-+    /* Following a conditional branch, we have a new basic block.
-+       But if we are inside a sequence, the new block starts after the
-+       last insn of the sequence.  */
-+    if (TARGET_IP28 && final_sequence == 0
-+        && (GET_CODE (insn) == CALL_INSN
-+            || (GET_CODE (insn) == JUMP_INSN && GET_CODE (body) == SET
-+                && GET_CODE (SET_SRC (body)) != LABEL_REF)
-+            || (GET_CODE (insn) == JUMP_INSN && GET_CODE (body) == PARALLEL
-+                && GET_CODE (XVECEXP (body, 0, 0)) == SET
-+                && GET_CODE (SET_SRC (XVECEXP (body, 0, 0))) != LABEL_REF)))
-+          new_block = NEW_BLOCK_BRANCH;
-+    return new_block;
-+}
-+
-+#endif /* TARGET_IP28 */
- 
- #include "gt-mips.h"
---- gcc-3.4.2/gcc/final.c	Sun Jan 18 23:39:57 2004
-+++ gcc-3.4.2/gcc/final.c	Fri Sep 23 15:11:38 2005
-@@ -116,6 +116,16 @@
- #define SEEN_NOTE	2
- #define SEEN_EMITTED	4
- 
-+/* suitable for SGI Indigo2 R10k (IP28) kernel-code ? */
-+#ifndef TARGET_IP28
-+#define ip28_set_new_block_label()
-+#define ip28_set_new_block_branch()
-+#define ip28_set_new_block_done()
-+#define ip28_handle_new_block_start(file, insn)
-+#define ip28_check_code_default_sequence(file, body)
-+#define ip28_check_code_real_insn(file, insn, final_sequence)
-+#endif
-+
- /* Last insn processed by final_scan_insn.  */
- static rtx debug_insn;
- rtx current_output_insn;
-@@ -1505,6 +1515,7 @@
-   int seen = 0;
- 
-   last_ignored_compare = 0;
-+  ip28_set_new_block_label();
- 
- #ifdef SDB_DEBUGGING_INFO
-   /* When producing SDB debugging info, delete troublesome line number
-@@ -1571,6 +1582,7 @@
- 
-       insn = final_scan_insn (insn, file, optimize, prescan, 0, &seen);
-     }
-+  ip28_set_new_block_done();
- }
- 
- const char *
-@@ -1851,6 +1863,7 @@
- #endif
-       if (prescan > 0)
- 	break;
-+      ip28_set_new_block_label();
- 
-       if (LABEL_NAME (insn))
- 	(*debug_hooks->label) (insn);
-@@ -2009,6 +2022,9 @@
- 
- 	    break;
- 	  }
-+
-+	ip28_handle_new_block_start(file, insn);
-+
- 	/* Output this line note if it is the first or the last line
- 	   note in a row.  */
- 	if (notice_source_line (insn))
-@@ -2134,9 +2150,13 @@
- 	      {
- 		CC_STATUS_INIT;
- 	      }
-+
-+            /* Following a conditional branch sequence, we have a new basic
-+               block.  */
-+	    ip28_check_code_default_sequence (file, body);
- 	    break;
- 	  }
--
-+	
- 	/* We have a real machine instruction as rtl.  */
- 
- 	body = PATTERN (insn);
-@@ -2188,6 +2208,11 @@
- 	  }
- #endif
- 
-+	/* Following a conditional branch, we have a new basic block.
-+	   But if we are inside a sequence, the new block starts after the
-+	   last insn of the sequence.  */
-+	ip28_check_code_real_insn (file, insn, final_sequence);
-+
- #ifndef STACK_REGS
- 	/* Don't bother outputting obvious no-ops, even without -O.
- 	   This optimization is fast and doesn't interfere with debugging.
-@@ -2402,6 +2427,7 @@
- 
- 	    if (prev_nonnote_insn (insn) != last_ignored_compare)
- 	      abort ();
-+	    ip28_set_new_block_done();
- 
- 	    /* We have already processed the notes between the setter and
- 	       the user.  Make sure we don't process them again, this is
-@@ -2435,6 +2461,7 @@
- 	    abort ();
- #endif
- 
-+	    ip28_set_new_block_done();
- 	    return new;
- 	  }
- 
diff --git a/sys-devel/gcc/files/3.4.2/gcc34-fix-sse2_pinsrw.patch b/sys-devel/gcc/files/3.4.2/gcc34-fix-sse2_pinsrw.patch
deleted file mode 100644
index 10aba38756c4..000000000000
--- a/sys-devel/gcc/files/3.4.2/gcc34-fix-sse2_pinsrw.patch
+++ /dev/null
@@ -1,38 +0,0 @@
-This is just a workaround rather than a real fix.  The real fix
-has been ported to the gcc 3.4.4 ebuild.
-
-
-Tested on i686-pc-linux and x86_64-pc-linux
-2004-09-20 Scott Robert Ladd <scott.ladd@coyotegulch.com>
-     PR 14631
-     * config/i386/i386.md (sse2_pinsrw): Changing the pattern of
-     sse2_pinsrw from vector_merge to unspec.
-
-http://gcc.gnu.org/ml/gcc-patches/2004-09/msg01949.html
-http://gcc.gnu.org/bugzilla/show_bug.cgi?id=14631
-
---- gcc-3.4.2/gcc/config/i386/i386.md
-+++ gcc-3.4.2/gcc/config/i386/i386.md
-@@ -105,6 +105,7 @@
-    (UNSPEC_MFENCE		59)
-    (UNSPEC_LFENCE		60)
-    (UNSPEC_PSADBW		61)
-+   (UNSPEC_PINSRW		62)
-    (UNSPEC_ADDSUB		71)
-    (UNSPEC_HADD			72)
-    (UNSPEC_HSUB			73)
-@@ -22095,11 +22096,12 @@
- 
- (define_insn "sse2_pinsrw"
-   [(set (match_operand:V8HI 0 "register_operand" "=x")
--        (vec_merge:V8HI (match_operand:V8HI 1 "register_operand" "0")
-+	(unspec:V8HI [(match_operand:V8HI 1 "register_operand" "0")
- 			(vec_duplicate:V8HI
- 			 (truncate:HI
- 			   (match_operand:SI 2 "nonimmediate_operand" "rm")))
--			(match_operand:SI 3 "const_0_to_255_operand" "N")))]
-+			(match_operand:SI 3 "const_0_to_255_operand" "N")]
-+			UNSPEC_PINSRW))]
-   "TARGET_SSE2"
-   "pinsrw\t{%3, %2, %0|%0, %2, %3}"
-   [(set_attr "type" "ssecvt")
diff --git a/sys-devel/gcc/files/3.4.2/gcc34-m32-no-sse2.patch b/sys-devel/gcc/files/3.4.2/gcc34-m32-no-sse2.patch
deleted file mode 100644
index 3050b40b45f0..000000000000
--- a/sys-devel/gcc/files/3.4.2/gcc34-m32-no-sse2.patch
+++ /dev/null
@@ -1,24 +0,0 @@
-diff -Nru gcc-3.4.2.old/gcc/config/i386/linux.h gcc-3.4.2/gcc/config/i386/linux.h
---- gcc-3.4.2.old/gcc/config/i386/linux.h	2004-09-21 16:02:45.049073592 +0000
-+++ gcc-3.4.2/gcc/config/i386/linux.h	2004-09-21 16:11:47.532603560 +0000
-@@ -90,7 +90,7 @@
- #endif
- 
- #undef CC1_SPEC
--#define CC1_SPEC "%(cc1_cpu) %{profile:-p}"
-+#define CC1_SPEC "%(cc1_cpu) %{profile:-p} %{!m64: %{!msse2:-mno-sse2} }"
- 
- /* Provide a LINK_SPEC appropriate for Linux.  Here we provide support
-    for the special GCC options -static and -shared, which allow us to
-diff -Nru gcc-3.4.2.old/gcc/config/i386/x86-64.h gcc-3.4.2/gcc/config/i386/x86-64.h
---- gcc-3.4.2.old/gcc/config/i386/x86-64.h	2004-09-21 16:02:45.113063864 +0000
-+++ gcc-3.4.2/gcc/config/i386/x86-64.h	2004-09-21 16:25:46.174110672 +0000
-@@ -45,7 +45,7 @@
- #define WCHAR_TYPE_SIZE 32
- 
- #undef CC1_SPEC
--#define CC1_SPEC "%(cc1_cpu) %{profile:-p}"
-+#define CC1_SPEC "%(cc1_cpu) %{profile:-p} %{m32: %{!msse2:-mno-sse2} }"
- 
- #undef ASM_SPEC
- #define ASM_SPEC "%{v:-V} %{Qy:} %{!Qn:-Qy} %{n} %{T} %{Ym,*} %{Yd,*} \
diff --git a/sys-devel/gcc/files/3.4.3/gcc-3.4.3-cross-compile.patch b/sys-devel/gcc/files/3.4.3/gcc-3.4.3-cross-compile.patch
deleted file mode 100644
index c3cc0787b890..000000000000
--- a/sys-devel/gcc/files/3.4.3/gcc-3.4.3-cross-compile.patch
+++ /dev/null
@@ -1,113 +0,0 @@
-Some notes on the 'bootstrap with or without libc headers' debate:
-http://linuxfromscratch.org/pipermail/lfs-dev/2005-July/052409.html
-http://gcc.gnu.org/ml/gcc/2005-07/msg01195.html
-
---- gcc/config/sh/linux.h
-+++ gcc/config/sh/linux.h
-@@ -154,6 +154,7 @@
- /* Do code reading to identify a signal frame, and set the frame
-    state data appropriately.  See unwind-dw2.c for the structs.  */
- 
-+#ifndef inhibit_libc
- #ifdef IN_LIBGCC2
- #include <signal.h>
- #include <sys/ucontext.h>
-@@ -304,6 +305,7 @@
- 
- #endif /* defined (__SH5__) */
- #endif /* IN_LIBGCC2 */
-+#endif /* inhibit_libc */
- 
- /* For SH3 and SH4, we use a slot of the unwind frame which correspond
-    to a fake register number 16 as a placeholder for the return address
---- gcc/config/rs6000/linux.h
-+++ gcc/config/rs6000/linux.h
-@@ -111,6 +111,7 @@
- /* Do code reading to identify a signal frame, and set the frame
-    state data appropriately.  See unwind-dw2.c for the structs.  */
- 
-+#ifndef inhibit_libc
- #ifdef IN_LIBGCC2
- #include <signal.h>
- 
-@@ -194,3 +195,4 @@
-     (FS)->retaddr_column = CR0_REGNO;					\
-     goto SUCCESS;							\
-   } while (0)
-+#endif /* inhibit_libc */
---- gcc/config/i386/linux.h
-+++ gcc/config/i386/linux.h
-@@ -218,6 +218,7 @@
- /* Do code reading to identify a signal frame, and set the frame
-    state data appropriately.  See unwind-dw2.c for the structs.  */
- 
-+#ifndef inhibit_libc
- #ifdef IN_LIBGCC2
- /* There's no sys/ucontext.h for some (all?) libc1, so no
-    signal-turned-exceptions for them.  There's also no configure-run for
-@@ -282,3 +283,4 @@
-   } while (0)
- #endif /* not USE_GNULIBC_1 */
- #endif /* IN_LIBGCC2 */
-+#endif /* inhibit_libc */
---- gcc/config/alpha/linux.h
-+++ gcc/config/alpha/linux.h
-@@ -78,6 +78,7 @@
- /* Do code reading to identify a signal frame, and set the frame
-    state data appropriately.  See unwind-dw2.c for the structs.  */
- 
-+#ifndef inhibit_libc
- #ifdef IN_LIBGCC2
- #include <signal.h>
- #include <sys/ucontext.h>
-@@ -127,3 +128,4 @@
-     (FS)->retaddr_column = 64;						\
-     goto SUCCESS;							\
-   } while (0)
-+#endif /* inhibit_libc */
---- gcc/config/rs6000/linux64.h
-+++ gcc/config/rs6000/linux64.h
-@@ -561,13 +579,12 @@
- /* Do code reading to identify a signal frame, and set the frame
-    state data appropriately.  See unwind-dw2.c for the structs.  */
- 
-+#ifndef inhibit_libc
- #ifdef IN_LIBGCC2
- #include <signal.h>
- #ifdef __powerpc64__
- #include <sys/ucontext.h>
- 
--enum { SIGNAL_FRAMESIZE = 128 };
--
- #else
- 
- /* During the 2.5 kernel series the kernel ucontext was changed, but
-@@ -581,7 +598,6 @@
-   struct sigcontext_struct uc_mcontext;
-   sigset_t          uc_sigmask;
- };
--enum { SIGNAL_FRAMESIZE = 64 };
- #endif
- 
- #endif
-@@ -733,3 +731,9 @@
-   } while (0)
- 
- #endif
-+#endif /* inhibit_libc */
-+#ifdef __powerpc64__
-+enum { SIGNAL_FRAMESIZE = 128 };
-+#else
-+enum { SIGNAL_FRAMESIZE = 64 };
-+#endif
---- gcc/config.gcc
-+++ gcc/config.gcc
-@@ -295,7 +295,7 @@
- 	need_64bit_hwint=yes
- 	;;
- # Note the 'l'; we need to be able to match e.g. "shle" or "shl".
--sh[123456789l]*-*-*)
-+sh[123456789lbe]*-*-*)
- 	cpu_type=sh
- 	need_64bit_hwint=yes
- 	;;
diff --git a/sys-devel/gcc/files/digest-gcc-3.4.1-r3 b/sys-devel/gcc/files/digest-gcc-3.4.1-r3
deleted file mode 100644
index e037179c96ea..000000000000
--- a/sys-devel/gcc/files/digest-gcc-3.4.1-r3
+++ /dev/null
@@ -1,18 +0,0 @@
-MD5 c6d950e8f61cbac4590061a116669b56 gcc-3.4.0-piepatches-v8.7.6.5.tar.bz2 16392
-RMD160 1c8243321ac183e3d3bcb71ea2c983bee528f826 gcc-3.4.0-piepatches-v8.7.6.5.tar.bz2 16392
-SHA256 1e07c8af8c23232ffb89500277cd6f187d14deb42f979dfa397839b182f48626 gcc-3.4.0-piepatches-v8.7.6.5.tar.bz2 16392
-MD5 029f1dde684d2f4132bc339908513451 gcc-3.4.1-branch-update-20040803.patch.bz2 220869
-RMD160 317a97b989f3634a277ad70120255479ef69614e gcc-3.4.1-branch-update-20040803.patch.bz2 220869
-SHA256 528c6c247575f9aad64b647082fa111a3b5fccd1ad24840f858bd61974b0f819 gcc-3.4.1-branch-update-20040803.patch.bz2 220869
-MD5 2764c295d8348f58defd33b7eea9d5b7 gcc-3.4.1-manpages.tar.bz2 614346
-RMD160 df968408b7e3c030f78d8bfe98ccf0f0c910357d gcc-3.4.1-manpages.tar.bz2 614346
-SHA256 f3c73574ddb243ca91ecc461f1508e1e3bcf11845dfe037c1f8c05aaa8e95959 gcc-3.4.1-manpages.tar.bz2 614346
-MD5 52bf522b3fdfb93f2e939c1b52e21590 gcc-3.4.1-patches-1.1.tar.bz2 33399
-RMD160 d074723c4beb8cc64af1b2e3a8d43ff9db22d357 gcc-3.4.1-patches-1.1.tar.bz2 33399
-SHA256 685833114d4808f3374fb616aa894443ac81169573b0042e561db0ec5790fdfa gcc-3.4.1-patches-1.1.tar.bz2 33399
-MD5 31b459062499f9f68d451db9cbf3205c gcc-3.4.1.tar.bz2 27182385
-RMD160 b25352913fde37121e2dfe5521149bdaf08b0f5d gcc-3.4.1.tar.bz2 27182385
-SHA256 5f3685533f8dc4b42b926fe70bb371b31e1368223a0ad7398ba27ea3a20e8e7a gcc-3.4.1.tar.bz2 27182385
-MD5 5db6cb16c361476f4bcb48df16793243 protector-3.4-2.tar.gz 31066
-RMD160 bbb7aeabc8308b7ab3e296923019e810f38c3305 protector-3.4-2.tar.gz 31066
-SHA256 a9decc15da37c84dc7ce50f44ceb528fd6592a405109f4e3be089b58e6c14a70 protector-3.4-2.tar.gz 31066
diff --git a/sys-devel/gcc/files/digest-gcc-3.4.4-r1 b/sys-devel/gcc/files/digest-gcc-3.4.4-r1
deleted file mode 100644
index c831bff289ac..000000000000
--- a/sys-devel/gcc/files/digest-gcc-3.4.4-r1
+++ /dev/null
@@ -1,18 +0,0 @@
-MD5 d5da59b788f30b6e31488cdae51ca822 bounds-checking-gcc-3.4.4-1.00.patch.bz2 815608
-RMD160 b5e1d4716a5ab881b5d7742bb6650e0492edce93 bounds-checking-gcc-3.4.4-1.00.patch.bz2 815608
-SHA256 a29adc9260071f5928f2e491803b73117ee176e4b19b56ce421aa3ca461370b2 bounds-checking-gcc-3.4.4-1.00.patch.bz2 815608
-MD5 4b4c3c72a93236e6c57477a6ce04230b gcc-3.4.4-patches-1.7.tar.bz2 47234
-RMD160 e4c8f0c966a3f22c9b32271a79b265e2a1d34161 gcc-3.4.4-patches-1.7.tar.bz2 47234
-SHA256 3077b77db3b7328c6594946adf8b0f134bdf77ae31fe010dc90094adab1b52c0 gcc-3.4.4-patches-1.7.tar.bz2 47234
-MD5 474718bd45586247a7937bed549d8562 gcc-3.4.4-piepatches-v8.7.8.tar.bz2 15514
-RMD160 9c750ede1259e8dd32a3def98aaaf268a643c8ae gcc-3.4.4-piepatches-v8.7.8.tar.bz2 15514
-SHA256 1f61e5c17c88d73ddaa0341902d4de8f3967c625dfbef2f7a3ea4eda0bd5e0cf gcc-3.4.4-piepatches-v8.7.8.tar.bz2 15514
-MD5 ca3387f40e4cfef56afe6f1f78f077e2 gcc-3.4.4-ssp-1.0.tar.bz2 31612
-RMD160 4db0a2dcf09272644c61db6c2385ba06af2f6440 gcc-3.4.4-ssp-1.0.tar.bz2 31612
-SHA256 b0e926fb36d6cfb428cd2aa912fac5b72442e24601f2724dbae67f772dbd980b gcc-3.4.4-ssp-1.0.tar.bz2 31612
-MD5 e690d56214e4298513380ebb724bc834 gcc-3.4.4-uclibc-patches-1.2.tar.bz2 26333
-RMD160 f979d4b96cb37ef6c5c8fc78e92efd1a1057d71a gcc-3.4.4-uclibc-patches-1.2.tar.bz2 26333
-SHA256 b015b1ffe2166c126bae1852ae6a19dea28b68f461e9aac82511fccd0cc37abd gcc-3.4.4-uclibc-patches-1.2.tar.bz2 26333
-MD5 b594ff4ea4fbef4ba9220887de713dfe gcc-3.4.4.tar.bz2 27565872
-RMD160 cb9c4154c9e34d45c80eb80fd7bc30b036e6fec4 gcc-3.4.4.tar.bz2 27565872
-SHA256 3444179840638cb8664e8e53604900c4521d29d57785a5091202ee4937d8d0fd gcc-3.4.4.tar.bz2 27565872
diff --git a/sys-devel/gcc/files/digest-gcc-3.4.5 b/sys-devel/gcc/files/digest-gcc-3.4.5
deleted file mode 100644
index 5234ff3ed477..000000000000
--- a/sys-devel/gcc/files/digest-gcc-3.4.5
+++ /dev/null
@@ -1,18 +0,0 @@
-MD5 d5da59b788f30b6e31488cdae51ca822 bounds-checking-gcc-3.4.4-1.00.patch.bz2 815608
-RMD160 b5e1d4716a5ab881b5d7742bb6650e0492edce93 bounds-checking-gcc-3.4.4-1.00.patch.bz2 815608
-SHA256 a29adc9260071f5928f2e491803b73117ee176e4b19b56ce421aa3ca461370b2 bounds-checking-gcc-3.4.4-1.00.patch.bz2 815608
-MD5 4d832eb1bb9fb67cf784d98acab356f8 gcc-3.4.5-patches-1.2.tar.bz2 48176
-RMD160 be86775306d55b9030373c2e979724659b35d0ad gcc-3.4.5-patches-1.2.tar.bz2 48176
-SHA256 013e3cebadc3bb71d7d41cfbbb6488b19c9df98be92d63c8ffa9261146d2773d gcc-3.4.5-patches-1.2.tar.bz2 48176
-MD5 c9403328cea26d2582310d7c821eb95a gcc-3.4.5-piepatches-v8.7.9.tar.bz2 8140
-RMD160 66aaa00b8261646cff64e7deabb6315dd9f39109 gcc-3.4.5-piepatches-v8.7.9.tar.bz2 8140
-SHA256 4af3c5671cbba9e015a6843ad646ba979fc91226cdaba8a074fbbc8dacfa07ad gcc-3.4.5-piepatches-v8.7.9.tar.bz2 8140
-MD5 cb9fda1432fb18b239935c9e23c0b637 gcc-3.4.5-ssp-1.0.tar.bz2 31589
-RMD160 24bfe531556455bd58833d589b84d09941af615a gcc-3.4.5-ssp-1.0.tar.bz2 31589
-SHA256 30036c39dc0b885c273ec4cbe57042ce6f458fa37ce6cbea58dd5ddeee0e2409 gcc-3.4.5-ssp-1.0.tar.bz2 31589
-MD5 b4f1d2ab4001a2d186b8d5830fcdccfc gcc-3.4.5-uclibc-patches-1.0.tar.bz2 26048
-RMD160 78e7dbaec309c38064a3e0ad0ff7bf8567518228 gcc-3.4.5-uclibc-patches-1.0.tar.bz2 26048
-SHA256 aa2ce81451297550fe0768c495e79991803673cc266dc27ea3de38acdcce365b gcc-3.4.5-uclibc-patches-1.0.tar.bz2 26048
-MD5 7c3c3c3e764dcee5eb771432062d69e1 gcc-3.4.5.tar.bz2 28254232
-RMD160 611ad033a76ada49d43529fc694142e856a039fa gcc-3.4.5.tar.bz2 28254232
-SHA256 be5738a94076052453894dd7d35b1efbb017bba1da0b28495d145f98fe018a09 gcc-3.4.5.tar.bz2 28254232
diff --git a/sys-devel/gcc/files/digest-gcc-3.4.5-r1 b/sys-devel/gcc/files/digest-gcc-3.4.5-r1
deleted file mode 100644
index 3cff97c2fd47..000000000000
--- a/sys-devel/gcc/files/digest-gcc-3.4.5-r1
+++ /dev/null
@@ -1,18 +0,0 @@
-MD5 d5da59b788f30b6e31488cdae51ca822 bounds-checking-gcc-3.4.4-1.00.patch.bz2 815608
-RMD160 b5e1d4716a5ab881b5d7742bb6650e0492edce93 bounds-checking-gcc-3.4.4-1.00.patch.bz2 815608
-SHA256 a29adc9260071f5928f2e491803b73117ee176e4b19b56ce421aa3ca461370b2 bounds-checking-gcc-3.4.4-1.00.patch.bz2 815608
-MD5 14054af39019bcfc4cd2cc579c7cd341 gcc-3.4.5-patches-1.4.tar.bz2 52228
-RMD160 5e1239b75a9db19404c36d99e3507ad0b1fc9d45 gcc-3.4.5-patches-1.4.tar.bz2 52228
-SHA256 c513a05d2ff0a2fd3e36d74e86991758c28c139a0d7c4ebdaafaf3f14a61cc10 gcc-3.4.5-patches-1.4.tar.bz2 52228
-MD5 c9403328cea26d2582310d7c821eb95a gcc-3.4.5-piepatches-v8.7.9.tar.bz2 8140
-RMD160 66aaa00b8261646cff64e7deabb6315dd9f39109 gcc-3.4.5-piepatches-v8.7.9.tar.bz2 8140
-SHA256 4af3c5671cbba9e015a6843ad646ba979fc91226cdaba8a074fbbc8dacfa07ad gcc-3.4.5-piepatches-v8.7.9.tar.bz2 8140
-MD5 cb9fda1432fb18b239935c9e23c0b637 gcc-3.4.5-ssp-1.0.tar.bz2 31589
-RMD160 24bfe531556455bd58833d589b84d09941af615a gcc-3.4.5-ssp-1.0.tar.bz2 31589
-SHA256 30036c39dc0b885c273ec4cbe57042ce6f458fa37ce6cbea58dd5ddeee0e2409 gcc-3.4.5-ssp-1.0.tar.bz2 31589
-MD5 90aa9cb64d7edcd9a2306abe910cbe3b gcc-3.4.5-uclibc-patches-1.1.tar.bz2 70923
-RMD160 89e42889420fbab22e418261d248a89ee2bbbe9b gcc-3.4.5-uclibc-patches-1.1.tar.bz2 70923
-SHA256 5b92fac2afe835a127976fdb6602fb5628cf28e67dd19e8289768a3bb8631ec2 gcc-3.4.5-uclibc-patches-1.1.tar.bz2 70923
-MD5 7c3c3c3e764dcee5eb771432062d69e1 gcc-3.4.5.tar.bz2 28254232
-RMD160 611ad033a76ada49d43529fc694142e856a039fa gcc-3.4.5.tar.bz2 28254232
-SHA256 be5738a94076052453894dd7d35b1efbb017bba1da0b28495d145f98fe018a09 gcc-3.4.5.tar.bz2 28254232
diff --git a/sys-devel/gcc/files/digest-gcc-3.4.6 b/sys-devel/gcc/files/digest-gcc-3.4.6
deleted file mode 100644
index bb21dbb9577c..000000000000
--- a/sys-devel/gcc/files/digest-gcc-3.4.6
+++ /dev/null
@@ -1,18 +0,0 @@
-MD5 d5da59b788f30b6e31488cdae51ca822 bounds-checking-gcc-3.4.4-1.00.patch.bz2 815608
-RMD160 b5e1d4716a5ab881b5d7742bb6650e0492edce93 bounds-checking-gcc-3.4.4-1.00.patch.bz2 815608
-SHA256 a29adc9260071f5928f2e491803b73117ee176e4b19b56ce421aa3ca461370b2 bounds-checking-gcc-3.4.4-1.00.patch.bz2 815608
-MD5 c9403328cea26d2582310d7c821eb95a gcc-3.4.5-piepatches-v8.7.9.tar.bz2 8140
-RMD160 66aaa00b8261646cff64e7deabb6315dd9f39109 gcc-3.4.5-piepatches-v8.7.9.tar.bz2 8140
-SHA256 4af3c5671cbba9e015a6843ad646ba979fc91226cdaba8a074fbbc8dacfa07ad gcc-3.4.5-piepatches-v8.7.9.tar.bz2 8140
-MD5 cb9fda1432fb18b239935c9e23c0b637 gcc-3.4.5-ssp-1.0.tar.bz2 31589
-RMD160 24bfe531556455bd58833d589b84d09941af615a gcc-3.4.5-ssp-1.0.tar.bz2 31589
-SHA256 30036c39dc0b885c273ec4cbe57042ce6f458fa37ce6cbea58dd5ddeee0e2409 gcc-3.4.5-ssp-1.0.tar.bz2 31589
-MD5 90aa9cb64d7edcd9a2306abe910cbe3b gcc-3.4.5-uclibc-patches-1.1.tar.bz2 70923
-RMD160 89e42889420fbab22e418261d248a89ee2bbbe9b gcc-3.4.5-uclibc-patches-1.1.tar.bz2 70923
-SHA256 5b92fac2afe835a127976fdb6602fb5628cf28e67dd19e8289768a3bb8631ec2 gcc-3.4.5-uclibc-patches-1.1.tar.bz2 70923
-MD5 0973b71cad5fff6668d4514a66ebd412 gcc-3.4.6-patches-1.0.tar.bz2 53093
-RMD160 f340ae3c80e73525b4f893d0d5eed80714ba6816 gcc-3.4.6-patches-1.0.tar.bz2 53093
-SHA256 f6b23e32d93bebf837dc845bf989ddd599e272fcba7aae55be3ecafd7e620d0c gcc-3.4.6-patches-1.0.tar.bz2 53093
-MD5 4a21ac777d4b5617283ce488b808da7b gcc-3.4.6.tar.bz2 28193401
-RMD160 b15003368cedc7964f6ceaee0c39ddc43a46c442 gcc-3.4.6.tar.bz2 28193401
-SHA256 7791a601878b765669022b8b3409fba33cc72f9e39340fec8af6d0e6f72dec39 gcc-3.4.6.tar.bz2 28193401
diff --git a/sys-devel/gcc/files/digest-gcc-3.4.6-r1 b/sys-devel/gcc/files/digest-gcc-3.4.6-r1
deleted file mode 100644
index 2e3594d51afa..000000000000
--- a/sys-devel/gcc/files/digest-gcc-3.4.6-r1
+++ /dev/null
@@ -1,18 +0,0 @@
-MD5 d5da59b788f30b6e31488cdae51ca822 bounds-checking-gcc-3.4.4-1.00.patch.bz2 815608
-RMD160 b5e1d4716a5ab881b5d7742bb6650e0492edce93 bounds-checking-gcc-3.4.4-1.00.patch.bz2 815608
-SHA256 a29adc9260071f5928f2e491803b73117ee176e4b19b56ce421aa3ca461370b2 bounds-checking-gcc-3.4.4-1.00.patch.bz2 815608
-MD5 c9403328cea26d2582310d7c821eb95a gcc-3.4.5-piepatches-v8.7.9.tar.bz2 8140
-RMD160 66aaa00b8261646cff64e7deabb6315dd9f39109 gcc-3.4.5-piepatches-v8.7.9.tar.bz2 8140
-SHA256 4af3c5671cbba9e015a6843ad646ba979fc91226cdaba8a074fbbc8dacfa07ad gcc-3.4.5-piepatches-v8.7.9.tar.bz2 8140
-MD5 cb9fda1432fb18b239935c9e23c0b637 gcc-3.4.5-ssp-1.0.tar.bz2 31589
-RMD160 24bfe531556455bd58833d589b84d09941af615a gcc-3.4.5-ssp-1.0.tar.bz2 31589
-SHA256 30036c39dc0b885c273ec4cbe57042ce6f458fa37ce6cbea58dd5ddeee0e2409 gcc-3.4.5-ssp-1.0.tar.bz2 31589
-MD5 90aa9cb64d7edcd9a2306abe910cbe3b gcc-3.4.5-uclibc-patches-1.1.tar.bz2 70923
-RMD160 89e42889420fbab22e418261d248a89ee2bbbe9b gcc-3.4.5-uclibc-patches-1.1.tar.bz2 70923
-SHA256 5b92fac2afe835a127976fdb6602fb5628cf28e67dd19e8289768a3bb8631ec2 gcc-3.4.5-uclibc-patches-1.1.tar.bz2 70923
-MD5 fe9514353eaf5a09ab16790b7714481b gcc-3.4.6-patches-1.2.tar.bz2 54757
-RMD160 d4e1240b9e45b7661b7f8bf4f57bb2c9cac17686 gcc-3.4.6-patches-1.2.tar.bz2 54757
-SHA256 43253a8defa6111bd6f107178cc46f425ec81efe0eb26b730c11c422a4d4de26 gcc-3.4.6-patches-1.2.tar.bz2 54757
-MD5 4a21ac777d4b5617283ce488b808da7b gcc-3.4.6.tar.bz2 28193401
-RMD160 b15003368cedc7964f6ceaee0c39ddc43a46c442 gcc-3.4.6.tar.bz2 28193401
-SHA256 7791a601878b765669022b8b3409fba33cc72f9e39340fec8af6d0e6f72dec39 gcc-3.4.6.tar.bz2 28193401