diff options
author | 2019-11-12 16:13:00 -0800 | |
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committer | 2019-11-12 16:13:00 -0800 | |
commit | 7722d40a9c412d26c30db8af5005b36de5618737 (patch) | |
tree | 37bc13ff53e7dc1bc0ef1040b7ef5e5a625c5b58 | |
parent | Automatic date update in version.in (diff) | |
download | binutils-gdb-7722d40a9c412d26c30db8af5005b36de5618737.tar.gz binutils-gdb-7722d40a9c412d26c30db8af5005b36de5618737.tar.bz2 binutils-gdb-7722d40a9c412d26c30db8af5005b36de5618737.zip |
RISC-V: Support the INSN_CLASS.*F.* classes for .insn directive.
We have to enable the f extension through -march or ELF attribute if we use the
FPR in .insn directive. The behavior is same as the riscv_opcodes.
2019-11-12 Nelson Chu <nelson.chu@sifive.com>
opcodes/
* riscv-opc.c (riscv_insn_types): Replace the INSN_CLASS_I with
INSN_CLASS_F and the INSN_CLASS_C with INSN_CLASS_F_AND_C if we
use the floating point register (FPR).
gas/
* testsuite/gas/riscv/insn.d: Add the f extension to -march option.
Change-Id: I4f59d04c82673ef84c56ecd2659ad8ce164dd626
-rw-r--r-- | gas/ChangeLog | 4 | ||||
-rw-r--r-- | gas/testsuite/gas/riscv/insn.d | 2 | ||||
-rw-r--r-- | opcodes/ChangeLog | 6 | ||||
-rw-r--r-- | opcodes/riscv-opc.c | 120 |
4 files changed, 71 insertions, 61 deletions
diff --git a/gas/ChangeLog b/gas/ChangeLog index d0ce992223c..00943667add 100644 --- a/gas/ChangeLog +++ b/gas/ChangeLog @@ -1,3 +1,7 @@ +2019-11-12 Nelson Chu <nelson.chu@sifive.com> + + * testsuite/gas/riscv/insn.d: Add the f extension to -march option. + 2019-11-12 Mihail Ionescu <mihail.ionescu@arm.com> * config/tc-arm.c (do_vfp_nsyn_push): Move in order to enable it for diff --git a/gas/testsuite/gas/riscv/insn.d b/gas/testsuite/gas/riscv/insn.d index 47b3a8e11cb..8f0badfce14 100644 --- a/gas/testsuite/gas/riscv/insn.d +++ b/gas/testsuite/gas/riscv/insn.d @@ -1,4 +1,4 @@ -#as: -march=rv32ic +#as: -march=rv32ifc #objdump: -dr .*:[ ]+file format .* diff --git a/opcodes/ChangeLog b/opcodes/ChangeLog index 62b05628159..c6ba9de3df7 100644 --- a/opcodes/ChangeLog +++ b/opcodes/ChangeLog @@ -1,3 +1,9 @@ +2019-11-12 Nelson Chu <nelson.chu@sifive.com> + + * riscv-opc.c (riscv_insn_types): Replace the INSN_CLASS_I with + INSN_CLASS_F and the INSN_CLASS_C with INSN_CLASS_F_AND_C if we + use the floating point register (FPR). + 2019-11-12 Mihail Ionescu <mihail.ionescu@arm.com> * opcodes/arm-dis.c (mve_opcodes): Enable VMOV imm to vec with diff --git a/opcodes/riscv-opc.c b/opcodes/riscv-opc.c index 06c752a96d5..dbbf99c74fe 100644 --- a/opcodes/riscv-opc.c +++ b/opcodes/riscv-opc.c @@ -787,96 +787,96 @@ const struct riscv_opcode riscv_insn_types[] = { /* name, xlen, isa, operands, match, mask, match_func, pinfo. */ {"r", 0, INSN_CLASS_I, "O4,F3,F7,d,s,t", 0, 0, match_opcode, 0 }, -{"r", 0, INSN_CLASS_I, "O4,F3,F7,D,s,t", 0, 0, match_opcode, 0 }, -{"r", 0, INSN_CLASS_I, "O4,F3,F7,d,S,t", 0, 0, match_opcode, 0 }, -{"r", 0, INSN_CLASS_I, "O4,F3,F7,D,S,t", 0, 0, match_opcode, 0 }, -{"r", 0, INSN_CLASS_I, "O4,F3,F7,d,s,T", 0, 0, match_opcode, 0 }, -{"r", 0, INSN_CLASS_I, "O4,F3,F7,D,s,T", 0, 0, match_opcode, 0 }, -{"r", 0, INSN_CLASS_I, "O4,F3,F7,d,S,T", 0, 0, match_opcode, 0 }, -{"r", 0, INSN_CLASS_I, "O4,F3,F7,D,S,T", 0, 0, match_opcode, 0 }, +{"r", 0, INSN_CLASS_F, "O4,F3,F7,D,s,t", 0, 0, match_opcode, 0 }, +{"r", 0, INSN_CLASS_F, "O4,F3,F7,d,S,t", 0, 0, match_opcode, 0 }, +{"r", 0, INSN_CLASS_F, "O4,F3,F7,D,S,t", 0, 0, match_opcode, 0 }, +{"r", 0, INSN_CLASS_F, "O4,F3,F7,d,s,T", 0, 0, match_opcode, 0 }, +{"r", 0, INSN_CLASS_F, "O4,F3,F7,D,s,T", 0, 0, match_opcode, 0 }, +{"r", 0, INSN_CLASS_F, "O4,F3,F7,d,S,T", 0, 0, match_opcode, 0 }, +{"r", 0, INSN_CLASS_F, "O4,F3,F7,D,S,T", 0, 0, match_opcode, 0 }, {"r", 0, INSN_CLASS_I, "O4,F3,F2,d,s,t,r", 0, 0, match_opcode, 0 }, -{"r", 0, INSN_CLASS_I, "O4,F3,F2,D,s,t,r", 0, 0, match_opcode, 0 }, -{"r", 0, INSN_CLASS_I, "O4,F3,F2,d,S,t,r", 0, 0, match_opcode, 0 }, -{"r", 0, INSN_CLASS_I, "O4,F3,F2,D,S,t,r", 0, 0, match_opcode, 0 }, -{"r", 0, INSN_CLASS_I, "O4,F3,F2,d,s,T,r", 0, 0, match_opcode, 0 }, -{"r", 0, INSN_CLASS_I, "O4,F3,F2,D,s,T,r", 0, 0, match_opcode, 0 }, -{"r", 0, INSN_CLASS_I, "O4,F3,F2,d,S,T,r", 0, 0, match_opcode, 0 }, -{"r", 0, INSN_CLASS_I, "O4,F3,F2,D,S,T,r", 0, 0, match_opcode, 0 }, -{"r", 0, INSN_CLASS_I, "O4,F3,F2,d,s,t,R", 0, 0, match_opcode, 0 }, -{"r", 0, INSN_CLASS_I, "O4,F3,F2,D,s,t,R", 0, 0, match_opcode, 0 }, -{"r", 0, INSN_CLASS_I, "O4,F3,F2,d,S,t,R", 0, 0, match_opcode, 0 }, -{"r", 0, INSN_CLASS_I, "O4,F3,F2,D,S,t,R", 0, 0, match_opcode, 0 }, -{"r", 0, INSN_CLASS_I, "O4,F3,F2,d,s,T,R", 0, 0, match_opcode, 0 }, -{"r", 0, INSN_CLASS_I, "O4,F3,F2,D,s,T,R", 0, 0, match_opcode, 0 }, -{"r", 0, INSN_CLASS_I, "O4,F3,F2,d,S,T,R", 0, 0, match_opcode, 0 }, -{"r", 0, INSN_CLASS_I, "O4,F3,F2,D,S,T,R", 0, 0, match_opcode, 0 }, +{"r", 0, INSN_CLASS_F, "O4,F3,F2,D,s,t,r", 0, 0, match_opcode, 0 }, +{"r", 0, INSN_CLASS_F, "O4,F3,F2,d,S,t,r", 0, 0, match_opcode, 0 }, +{"r", 0, INSN_CLASS_F, "O4,F3,F2,D,S,t,r", 0, 0, match_opcode, 0 }, +{"r", 0, INSN_CLASS_F, "O4,F3,F2,d,s,T,r", 0, 0, match_opcode, 0 }, +{"r", 0, INSN_CLASS_F, "O4,F3,F2,D,s,T,r", 0, 0, match_opcode, 0 }, +{"r", 0, INSN_CLASS_F, "O4,F3,F2,d,S,T,r", 0, 0, match_opcode, 0 }, +{"r", 0, INSN_CLASS_F, "O4,F3,F2,D,S,T,r", 0, 0, match_opcode, 0 }, +{"r", 0, INSN_CLASS_F, "O4,F3,F2,d,s,t,R", 0, 0, match_opcode, 0 }, +{"r", 0, INSN_CLASS_F, "O4,F3,F2,D,s,t,R", 0, 0, match_opcode, 0 }, +{"r", 0, INSN_CLASS_F, "O4,F3,F2,d,S,t,R", 0, 0, match_opcode, 0 }, +{"r", 0, INSN_CLASS_F, "O4,F3,F2,D,S,t,R", 0, 0, match_opcode, 0 }, +{"r", 0, INSN_CLASS_F, "O4,F3,F2,d,s,T,R", 0, 0, match_opcode, 0 }, +{"r", 0, INSN_CLASS_F, "O4,F3,F2,D,s,T,R", 0, 0, match_opcode, 0 }, +{"r", 0, INSN_CLASS_F, "O4,F3,F2,d,S,T,R", 0, 0, match_opcode, 0 }, +{"r", 0, INSN_CLASS_F, "O4,F3,F2,D,S,T,R", 0, 0, match_opcode, 0 }, {"r4", 0, INSN_CLASS_I, "O4,F3,F2,d,s,t,r", 0, 0, match_opcode, 0 }, -{"r4", 0, INSN_CLASS_I, "O4,F3,F2,D,s,t,r", 0, 0, match_opcode, 0 }, -{"r4", 0, INSN_CLASS_I, "O4,F3,F2,d,S,t,r", 0, 0, match_opcode, 0 }, -{"r4", 0, INSN_CLASS_I, "O4,F3,F2,D,S,t,r", 0, 0, match_opcode, 0 }, -{"r4", 0, INSN_CLASS_I, "O4,F3,F2,d,s,T,r", 0, 0, match_opcode, 0 }, -{"r4", 0, INSN_CLASS_I, "O4,F3,F2,D,s,T,r", 0, 0, match_opcode, 0 }, -{"r4", 0, INSN_CLASS_I, "O4,F3,F2,d,S,T,r", 0, 0, match_opcode, 0 }, -{"r4", 0, INSN_CLASS_I, "O4,F3,F2,D,S,T,r", 0, 0, match_opcode, 0 }, -{"r4", 0, INSN_CLASS_I, "O4,F3,F2,d,s,t,R", 0, 0, match_opcode, 0 }, -{"r4", 0, INSN_CLASS_I, "O4,F3,F2,D,s,t,R", 0, 0, match_opcode, 0 }, -{"r4", 0, INSN_CLASS_I, "O4,F3,F2,d,S,t,R", 0, 0, match_opcode, 0 }, -{"r4", 0, INSN_CLASS_I, "O4,F3,F2,D,S,t,R", 0, 0, match_opcode, 0 }, -{"r4", 0, INSN_CLASS_I, "O4,F3,F2,d,s,T,R", 0, 0, match_opcode, 0 }, -{"r4", 0, INSN_CLASS_I, "O4,F3,F2,D,s,T,R", 0, 0, match_opcode, 0 }, -{"r4", 0, INSN_CLASS_I, "O4,F3,F2,d,S,T,R", 0, 0, match_opcode, 0 }, -{"r4", 0, INSN_CLASS_I, "O4,F3,F2,D,S,T,R", 0, 0, match_opcode, 0 }, +{"r4", 0, INSN_CLASS_F, "O4,F3,F2,D,s,t,r", 0, 0, match_opcode, 0 }, +{"r4", 0, INSN_CLASS_F, "O4,F3,F2,d,S,t,r", 0, 0, match_opcode, 0 }, +{"r4", 0, INSN_CLASS_F, "O4,F3,F2,D,S,t,r", 0, 0, match_opcode, 0 }, +{"r4", 0, INSN_CLASS_F, "O4,F3,F2,d,s,T,r", 0, 0, match_opcode, 0 }, +{"r4", 0, INSN_CLASS_F, "O4,F3,F2,D,s,T,r", 0, 0, match_opcode, 0 }, +{"r4", 0, INSN_CLASS_F, "O4,F3,F2,d,S,T,r", 0, 0, match_opcode, 0 }, +{"r4", 0, INSN_CLASS_F, "O4,F3,F2,D,S,T,r", 0, 0, match_opcode, 0 }, +{"r4", 0, INSN_CLASS_F, "O4,F3,F2,d,s,t,R", 0, 0, match_opcode, 0 }, +{"r4", 0, INSN_CLASS_F, "O4,F3,F2,D,s,t,R", 0, 0, match_opcode, 0 }, +{"r4", 0, INSN_CLASS_F, "O4,F3,F2,d,S,t,R", 0, 0, match_opcode, 0 }, +{"r4", 0, INSN_CLASS_F, "O4,F3,F2,D,S,t,R", 0, 0, match_opcode, 0 }, +{"r4", 0, INSN_CLASS_F, "O4,F3,F2,d,s,T,R", 0, 0, match_opcode, 0 }, +{"r4", 0, INSN_CLASS_F, "O4,F3,F2,D,s,T,R", 0, 0, match_opcode, 0 }, +{"r4", 0, INSN_CLASS_F, "O4,F3,F2,d,S,T,R", 0, 0, match_opcode, 0 }, +{"r4", 0, INSN_CLASS_F, "O4,F3,F2,D,S,T,R", 0, 0, match_opcode, 0 }, {"i", 0, INSN_CLASS_I, "O4,F3,d,s,j", 0, 0, match_opcode, 0 }, -{"i", 0, INSN_CLASS_I, "O4,F3,D,s,j", 0, 0, match_opcode, 0 }, -{"i", 0, INSN_CLASS_I, "O4,F3,d,S,j", 0, 0, match_opcode, 0 }, -{"i", 0, INSN_CLASS_I, "O4,F3,D,S,j", 0, 0, match_opcode, 0 }, +{"i", 0, INSN_CLASS_F, "O4,F3,D,s,j", 0, 0, match_opcode, 0 }, +{"i", 0, INSN_CLASS_F, "O4,F3,d,S,j", 0, 0, match_opcode, 0 }, +{"i", 0, INSN_CLASS_F, "O4,F3,D,S,j", 0, 0, match_opcode, 0 }, {"i", 0, INSN_CLASS_I, "O4,F3,d,o(s)", 0, 0, match_opcode, 0 }, -{"i", 0, INSN_CLASS_I, "O4,F3,D,o(s)", 0, 0, match_opcode, 0 }, +{"i", 0, INSN_CLASS_F, "O4,F3,D,o(s)", 0, 0, match_opcode, 0 }, {"s", 0, INSN_CLASS_I, "O4,F3,t,q(s)", 0, 0, match_opcode, 0 }, -{"s", 0, INSN_CLASS_I, "O4,F3,T,q(s)", 0, 0, match_opcode, 0 }, +{"s", 0, INSN_CLASS_F, "O4,F3,T,q(s)", 0, 0, match_opcode, 0 }, {"sb", 0, INSN_CLASS_I, "O4,F3,s,t,p", 0, 0, match_opcode, 0 }, -{"sb", 0, INSN_CLASS_I, "O4,F3,S,t,p", 0, 0, match_opcode, 0 }, -{"sb", 0, INSN_CLASS_I, "O4,F3,s,T,p", 0, 0, match_opcode, 0 }, -{"sb", 0, INSN_CLASS_I, "O4,F3,S,T,p", 0, 0, match_opcode, 0 }, +{"sb", 0, INSN_CLASS_F, "O4,F3,S,t,p", 0, 0, match_opcode, 0 }, +{"sb", 0, INSN_CLASS_F, "O4,F3,s,T,p", 0, 0, match_opcode, 0 }, +{"sb", 0, INSN_CLASS_F, "O4,F3,S,T,p", 0, 0, match_opcode, 0 }, {"b", 0, INSN_CLASS_I, "O4,F3,s,t,p", 0, 0, match_opcode, 0 }, -{"b", 0, INSN_CLASS_I, "O4,F3,S,t,p", 0, 0, match_opcode, 0 }, -{"b", 0, INSN_CLASS_I, "O4,F3,s,T,p", 0, 0, match_opcode, 0 }, -{"b", 0, INSN_CLASS_I, "O4,F3,S,T,p", 0, 0, match_opcode, 0 }, +{"b", 0, INSN_CLASS_F, "O4,F3,S,t,p", 0, 0, match_opcode, 0 }, +{"b", 0, INSN_CLASS_F, "O4,F3,s,T,p", 0, 0, match_opcode, 0 }, +{"b", 0, INSN_CLASS_F, "O4,F3,S,T,p", 0, 0, match_opcode, 0 }, {"u", 0, INSN_CLASS_I, "O4,d,u", 0, 0, match_opcode, 0 }, -{"u", 0, INSN_CLASS_I, "O4,D,u", 0, 0, match_opcode, 0 }, +{"u", 0, INSN_CLASS_F, "O4,D,u", 0, 0, match_opcode, 0 }, {"uj", 0, INSN_CLASS_I, "O4,d,a", 0, 0, match_opcode, 0 }, -{"uj", 0, INSN_CLASS_I, "O4,D,a", 0, 0, match_opcode, 0 }, +{"uj", 0, INSN_CLASS_F, "O4,D,a", 0, 0, match_opcode, 0 }, {"j", 0, INSN_CLASS_I, "O4,d,a", 0, 0, match_opcode, 0 }, -{"j", 0, INSN_CLASS_I, "O4,D,a", 0, 0, match_opcode, 0 }, +{"j", 0, INSN_CLASS_F, "O4,D,a", 0, 0, match_opcode, 0 }, {"cr", 0, INSN_CLASS_C, "O2,CF4,d,CV", 0, 0, match_opcode, 0 }, -{"cr", 0, INSN_CLASS_C, "O2,CF4,D,CV", 0, 0, match_opcode, 0 }, -{"cr", 0, INSN_CLASS_C, "O2,CF4,d,CT", 0, 0, match_opcode, 0 }, -{"cr", 0, INSN_CLASS_C, "O2,CF4,D,CT", 0, 0, match_opcode, 0 }, +{"cr", 0, INSN_CLASS_F_AND_C, "O2,CF4,D,CV", 0, 0, match_opcode, 0 }, +{"cr", 0, INSN_CLASS_F_AND_C, "O2,CF4,d,CT", 0, 0, match_opcode, 0 }, +{"cr", 0, INSN_CLASS_F_AND_C, "O2,CF4,D,CT", 0, 0, match_opcode, 0 }, {"ci", 0, INSN_CLASS_C, "O2,CF3,d,Co", 0, 0, match_opcode, 0 }, -{"ci", 0, INSN_CLASS_C, "O2,CF3,D,Co", 0, 0, match_opcode, 0 }, +{"ci", 0, INSN_CLASS_F_AND_C, "O2,CF3,D,Co", 0, 0, match_opcode, 0 }, {"ciw", 0, INSN_CLASS_C, "O2,CF3,Ct,C8", 0, 0, match_opcode, 0 }, -{"ciw", 0, INSN_CLASS_C, "O2,CF3,CD,C8", 0, 0, match_opcode, 0 }, +{"ciw", 0, INSN_CLASS_F_AND_C, "O2,CF3,CD,C8", 0, 0, match_opcode, 0 }, {"ca", 0, INSN_CLASS_C, "O2,CF6,CF2,Cs,Ct", 0, 0, match_opcode, 0 }, -{"ca", 0, INSN_CLASS_C, "O2,CF6,CF2,CS,Ct", 0, 0, match_opcode, 0 }, -{"ca", 0, INSN_CLASS_C, "O2,CF6,CF2,Cs,CD", 0, 0, match_opcode, 0 }, -{"ca", 0, INSN_CLASS_C, "O2,CF6,CF2,CS,CD", 0, 0, match_opcode, 0 }, +{"ca", 0, INSN_CLASS_F_AND_C, "O2,CF6,CF2,CS,Ct", 0, 0, match_opcode, 0 }, +{"ca", 0, INSN_CLASS_F_AND_C, "O2,CF6,CF2,Cs,CD", 0, 0, match_opcode, 0 }, +{"ca", 0, INSN_CLASS_F_AND_C, "O2,CF6,CF2,CS,CD", 0, 0, match_opcode, 0 }, {"cb", 0, INSN_CLASS_C, "O2,CF3,Cs,Cp", 0, 0, match_opcode, 0 }, -{"cb", 0, INSN_CLASS_C, "O2,CF3,CS,Cp", 0, 0, match_opcode, 0 }, +{"cb", 0, INSN_CLASS_F_AND_C, "O2,CF3,CS,Cp", 0, 0, match_opcode, 0 }, {"cj", 0, INSN_CLASS_C, "O2,CF3,Ca", 0, 0, match_opcode, 0 }, /* Terminate the list. */ |