BFD whitespace fixes

Binutils is supposed to use tabs.  In my git config I have
whitespace = indent-with-non-tab,space-before-tab,trailing-space
and I got annoyed enough seeing red in "git diff" output to fix
the problems.

	* doc/header.sed: Trim trailing space when splitting lines.
	* aix386-core.c, * aout-adobe.c, * aout-arm.c, * aout-cris.c,
	* aout-ns32k.c, * aout-target.h, * aout-tic30.c, * aoutf1.h, * aoutx.h,
	* arc-got.h, * arc-plt.def, * arc-plt.h, * archive.c, * archive64.c,
	* archures.c, * armnetbsd.c, * bfd-in.h, * bfd.c, * bfdio.c, * binary.c,
	* bout.c, * cache.c, * cisco-core.c, * coff-alpha.c, * coff-apollo.c,
	* coff-arm.c, * coff-h8300.c, * coff-i386.c, * coff-i860.c,
	* coff-i960.c, * coff-m68k.c, * coff-m88k.c, * coff-mcore.c,
	* coff-mips.c, * coff-ppc.c, * coff-rs6000.c, * coff-sh.c,
	* coff-stgo32.c, * coff-tic4x.c, * coff-tic54x.c, * coff-tic80.c,
	* coff-we32k.c, * coff-x86_64.c, * coff-z80.c, * coff-z8k.c,
	* coff64-rs6000.c, * coffcode.h, * coffgen.c, * cofflink.c,
	* coffswap.h, * compress.c, * corefile.c, * cpu-alpha.c, * cpu-arm.c,
	* cpu-avr.c, * cpu-bfin.c, * cpu-cr16.c, * cpu-cr16c.c, * cpu-crx.c,
	* cpu-d10v.c, * cpu-frv.c, * cpu-ft32.c, * cpu-i370.c, * cpu-i960.c,
	* cpu-ia64-opc.c, * cpu-ip2k.c, * cpu-lm32.c, * cpu-m32r.c,
	* cpu-mcore.c, * cpu-microblaze.c, * cpu-mips.c, * cpu-moxie.c,
	* cpu-mt.c, * cpu-nios2.c, * cpu-ns32k.c, * cpu-or1k.c, * cpu-powerpc.c,
	* cpu-pru.c, * cpu-sh.c, * cpu-spu.c, * cpu-v850.c, * cpu-v850_rh850.c,
	* cpu-xgate.c, * cpu-z80.c, * dwarf1.c, * dwarf2.c, * ecoff.c,
	* ecofflink.c, * ecoffswap.h, * elf-bfd.h, * elf-eh-frame.c,
	* elf-hppa.h, * elf-m10200.c, * elf-m10300.c, * elf-s390-common.c,
	* elf-strtab.c, * elf-vxworks.c, * elf.c, * elf32-am33lin.c,
	* elf32-arc.c, * elf32-arm.c, * elf32-avr.c, * elf32-avr.h,
	* elf32-bfin.c, * elf32-cr16.c, * elf32-cr16c.c, * elf32-cris.c,
	* elf32-crx.c, * elf32-d10v.c, * elf32-d30v.c, * elf32-dlx.c,
	* elf32-epiphany.c, * elf32-fr30.c, * elf32-frv.c, * elf32-ft32.c,
	* elf32-h8300.c, * elf32-hppa.c, * elf32-i386.c, * elf32-i860.c,
	* elf32-i960.c, * elf32-ip2k.c, * elf32-lm32.c, * elf32-m32c.c,
	* elf32-m32r.c, * elf32-m68hc11.c, * elf32-m68hc12.c, * elf32-m68hc1x.c,
	* elf32-m68hc1x.h, * elf32-m68k.c, * elf32-m88k.c, * elf32-mcore.c,
	* elf32-mep.c, * elf32-metag.c, * elf32-microblaze.c, * elf32-mips.c,
	* elf32-moxie.c, * elf32-msp430.c, * elf32-mt.c, * elf32-nds32.c,
	* elf32-nds32.h, * elf32-nios2.c, * elf32-or1k.c, * elf32-pj.c,
	* elf32-ppc.c, * elf32-ppc.h, * elf32-pru.c, * elf32-rl78.c,
	* elf32-rx.c, * elf32-s390.c, * elf32-score.c, * elf32-score.h,
	* elf32-score7.c, * elf32-sh-symbian.c, * elf32-sh.c, * elf32-sh64.c,
	* elf32-sparc.c, * elf32-spu.c, * elf32-tic6x.c, * elf32-tilegx.c,
	* elf32-tilegx.h, * elf32-tilepro.c, * elf32-tilepro.h, * elf32-v850.c,
	* elf32-vax.c, * elf32-wasm32.c, * elf32-xc16x.c, * elf32-xgate.c,
	* elf32-xgate.h, * elf32-xstormy16.c, * elf32-xtensa.c, * elf64-alpha.c,
	* elf64-hppa.c, * elf64-ia64-vms.c, * elf64-mips.c, * elf64-mmix.c,
	* elf64-ppc.c, * elf64-s390.c, * elf64-sh64.c, * elf64-sparc.c,
	* elf64-tilegx.c, * elf64-tilegx.h, * elf64-x86-64.c, * elfcore.h,
	* elflink.c, * elfn32-mips.c, * elfnn-aarch64.c, * elfnn-ia64.c,
	* elfnn-riscv.c, * elfxx-aarch64.c, * elfxx-aarch64.h, * elfxx-ia64.c,
	* elfxx-ia64.h, * elfxx-mips.c, * elfxx-riscv.c, * elfxx-sparc.c,
	* elfxx-tilegx.c, * elfxx-x86.c, * elfxx-x86.h, * freebsd.h, * hash.c,
	* host-aout.c, * hp300hpux.c, * hppabsd-core.c, * hpux-core.c,
	* i386aout.c, * i386linux.c, * i386lynx.c, * i386mach3.c, * i386msdos.c,
	* i386netbsd.c, * ieee.c, * ihex.c, * irix-core.c, * libaout.h,
	* libbfd-in.h, * libbfd.c, * libcoff-in.h, * libnlm.h, * libpei.h,
	* libxcoff.h, * linker.c, * lynx-core.c, * m68k4knetbsd.c,
	* m68klinux.c, * m68knetbsd.c, * m88kmach3.c, * mach-o-aarch64.c,
	* mach-o-arm.c, * mach-o-i386.c, * mach-o-target.c, * mach-o-x86-64.c,
	* mach-o.c, * mach-o.h, * merge.c, * mipsbsd.c, * mmo.c, * netbsd.h,
	* netbsd-core.c, * newsos3.c, * nlm-target.h, * nlm32-ppc.c,
	* nlm32-sparc.c, * nlmcode.h, * ns32k.h, * ns32knetbsd.c, * oasys.c,
	* opncls.c, * pc532-mach.c, * pdp11.c, * pe-arm.c, * pe-i386.c,
	* pe-mcore.c, * pe-mips.c, * pe-x86_64.c, * peXXigen.c, * pef.c,
	* pef.h, * pei-arm.c, * pei-i386.c, * pei-mcore.c, * pei-x86_64.c,
	* peicode.h, * plugin.c, * ppcboot.c, * ptrace-core.c, * reloc.c,
	* riscix.c, * rs6000-core.c, * section.c, * som.c, * som.h,
	* sparclinux.c, * sparcnetbsd.c, * srec.c, * stabs.c, * sunos.c,
	* syms.c, * targets.c, * tekhex.c, * trad-core.c, * vax1knetbsd.c,
	* vaxnetbsd.c, * verilog.c, * versados.c, * vms-alpha.c, * vms-lib.c,
	* vms-misc.c, * wasm-module.c, * wasm-module.h, * xcofflink.c,
	* xsym.c, * xsym.h: Whitespace fixes.
	* bfd-in2.h, * libbfd.h, * libcoff.h: Regenerate.

1 files changed, 79 insertions, 79 deletions

diff --git a/bfd/elf32-msp430.c b/bfd/elf32-msp430.c
index 774c54adb96..8c3088f868a 100644
--- a/bfd/elf32-msp430.c
+++ b/bfd/elf32-msp430.c
@@ -470,7 +470,7 @@ static reloc_howto_type elf_msp430x_howto_table[] =
 	 FALSE,			/* partial_inplace */
 	 0,			/* src_mask */
 	 0xffff,		/* dst_mask */
-	 TRUE),                 /* pcrel_offset */
+	 TRUE),			/* pcrel_offset */
 
   EMPTY_HOWTO (R_MSP430_EHTYPE),
 
@@ -487,7 +487,7 @@ static reloc_howto_type elf_msp430x_howto_table[] =
 	 FALSE,			/* partial_inplace */
 	 0x3ff,			/* src_mask */
 	 0x3ff,			/* dst_mask */
-	 TRUE),  		/* pcrel_offset */
+	 TRUE),			/* pcrel_offset */
 
   /* A 10 bit PC relative relocation for complicated polymorphs.  */
   HOWTO (R_MSP430X_2X_PCREL,	/* type */
@@ -531,27 +531,27 @@ struct msp430_reloc_map
 
 static const struct msp430_reloc_map msp430_reloc_map[] =
 {
-  {BFD_RELOC_NONE,                 R_MSP430_NONE},
-  {BFD_RELOC_32,                   R_MSP430_32},
-  {BFD_RELOC_MSP430_10_PCREL,      R_MSP430_10_PCREL},
-  {BFD_RELOC_16,                   R_MSP430_16_BYTE},
-  {BFD_RELOC_MSP430_16_PCREL,      R_MSP430_16_PCREL},
-  {BFD_RELOC_MSP430_16,            R_MSP430_16},
+  {BFD_RELOC_NONE,		   R_MSP430_NONE},
+  {BFD_RELOC_32,		   R_MSP430_32},
+  {BFD_RELOC_MSP430_10_PCREL,	   R_MSP430_10_PCREL},
+  {BFD_RELOC_16,		   R_MSP430_16_BYTE},
+  {BFD_RELOC_MSP430_16_PCREL,	   R_MSP430_16_PCREL},
+  {BFD_RELOC_MSP430_16,		   R_MSP430_16},
   {BFD_RELOC_MSP430_16_PCREL_BYTE, R_MSP430_16_PCREL_BYTE},
-  {BFD_RELOC_MSP430_16_BYTE,       R_MSP430_16_BYTE},
-  {BFD_RELOC_MSP430_2X_PCREL,      R_MSP430_2X_PCREL},
-  {BFD_RELOC_MSP430_RL_PCREL,      R_MSP430_RL_PCREL},
-  {BFD_RELOC_8,                    R_MSP430_8},
-  {BFD_RELOC_MSP430_SYM_DIFF,      R_MSP430_SYM_DIFF}
+  {BFD_RELOC_MSP430_16_BYTE,	   R_MSP430_16_BYTE},
+  {BFD_RELOC_MSP430_2X_PCREL,	   R_MSP430_2X_PCREL},
+  {BFD_RELOC_MSP430_RL_PCREL,	   R_MSP430_RL_PCREL},
+  {BFD_RELOC_8,			   R_MSP430_8},
+  {BFD_RELOC_MSP430_SYM_DIFF,	   R_MSP430_SYM_DIFF}
 };
 
 static const struct msp430_reloc_map msp430x_reloc_map[] =
 {
-  {BFD_RELOC_NONE,                    R_MSP430_NONE},
-  {BFD_RELOC_32,                      R_MSP430_ABS32},
-  {BFD_RELOC_16,                      R_MSP430_ABS16},
-  {BFD_RELOC_8,                       R_MSP430_ABS8},
-  {BFD_RELOC_MSP430_ABS8,             R_MSP430_ABS8},
+  {BFD_RELOC_NONE,		      R_MSP430_NONE},
+  {BFD_RELOC_32,		      R_MSP430_ABS32},
+  {BFD_RELOC_16,		      R_MSP430_ABS16},
+  {BFD_RELOC_8,			      R_MSP430_ABS8},
+  {BFD_RELOC_MSP430_ABS8,	      R_MSP430_ABS8},
   {BFD_RELOC_MSP430X_PCR20_EXT_SRC,   R_MSP430X_PCR20_EXT_SRC},
   {BFD_RELOC_MSP430X_PCR20_EXT_DST,   R_MSP430X_PCR20_EXT_DST},
   {BFD_RELOC_MSP430X_PCR20_EXT_ODST,  R_MSP430X_PCR20_EXT_ODST},
@@ -560,15 +560,15 @@ static const struct msp430_reloc_map msp430x_reloc_map[] =
   {BFD_RELOC_MSP430X_ABS20_EXT_ODST,  R_MSP430X_ABS20_EXT_ODST},
   {BFD_RELOC_MSP430X_ABS20_ADR_SRC,   R_MSP430X_ABS20_ADR_SRC},
   {BFD_RELOC_MSP430X_ABS20_ADR_DST,   R_MSP430X_ABS20_ADR_DST},
-  {BFD_RELOC_MSP430X_PCR16,           R_MSP430X_PCR16},
+  {BFD_RELOC_MSP430X_PCR16,	      R_MSP430X_PCR16},
   {BFD_RELOC_MSP430X_PCR20_CALL,      R_MSP430X_PCR20_CALL},
-  {BFD_RELOC_MSP430X_ABS16,           R_MSP430X_ABS16},
-  {BFD_RELOC_MSP430_ABS_HI16,         R_MSP430_ABS_HI16},
-  {BFD_RELOC_MSP430_PREL31,           R_MSP430_PREL31},
-  {BFD_RELOC_MSP430_10_PCREL,         R_MSP430X_10_PCREL},
-  {BFD_RELOC_MSP430_2X_PCREL,         R_MSP430X_2X_PCREL},
-  {BFD_RELOC_MSP430_RL_PCREL,         R_MSP430X_PCR16},
-  {BFD_RELOC_MSP430_SYM_DIFF,         R_MSP430X_SYM_DIFF}
+  {BFD_RELOC_MSP430X_ABS16,	      R_MSP430X_ABS16},
+  {BFD_RELOC_MSP430_ABS_HI16,	      R_MSP430_ABS_HI16},
+  {BFD_RELOC_MSP430_PREL31,	      R_MSP430_PREL31},
+  {BFD_RELOC_MSP430_10_PCREL,	      R_MSP430X_10_PCREL},
+  {BFD_RELOC_MSP430_2X_PCREL,	      R_MSP430X_2X_PCREL},
+  {BFD_RELOC_MSP430_RL_PCREL,	      R_MSP430X_PCR16},
+  {BFD_RELOC_MSP430_SYM_DIFF,	      R_MSP430X_SYM_DIFF}
 };
 
 static inline bfd_boolean
@@ -705,12 +705,12 @@ elf32_msp430_check_relocs (bfd * abfd, struct bfd_link_info * info,
    routines, but a few relocs, we have to do them ourselves.  */
 
 static bfd_reloc_status_type
-msp430_final_link_relocate (reloc_howto_type *     howto,
-			    bfd *                  input_bfd,
-			    asection *             input_section,
-			    bfd_byte *             contents,
-			    Elf_Internal_Rela *    rel,
-			    bfd_vma                relocation,
+msp430_final_link_relocate (reloc_howto_type *	   howto,
+			    bfd *		   input_bfd,
+			    asection *		   input_section,
+			    bfd_byte *		   contents,
+			    Elf_Internal_Rela *	   rel,
+			    bfd_vma		   relocation,
 			    struct bfd_link_info * info)
 {
   static asection *  sym_diff_section;
@@ -1481,26 +1481,26 @@ elf32_msp430_object_p (bfd * abfd)
 
    1. 3 words -> 1 word
 
-   eq      ==      jeq label    		jne +4; br lab
-   ne      !=      jne label    		jeq +4; br lab
-   lt      <       jl  label    		jge +4; br lab
-   ltu     <       jlo label    		lhs +4; br lab
-   ge      >=      jge label    		jl  +4; br lab
-   geu     >=      jhs label    		jlo +4; br lab
+   eq	   ==	   jeq label			jne +4; br lab
+   ne	   !=	   jne label			jeq +4; br lab
+   lt	   <	   jl  label			jge +4; br lab
+   ltu	   <	   jlo label			lhs +4; br lab
+   ge	   >=	   jge label			jl  +4; br lab
+   geu	   >=	   jhs label			jlo +4; br lab
 
    2. 4 words -> 1 word
 
-   ltn     <       jn                      jn  +2; jmp +4; br lab
+   ltn	   <	   jn			   jn  +2; jmp +4; br lab
 
    3. 4 words -> 2 words
 
-   gt      >       jeq +2; jge label       jeq +6; jl  +4; br label
-   gtu     >       jeq +2; jhs label       jeq +6; jlo +4; br label
+   gt	   >	   jeq +2; jge label	   jeq +6; jl  +4; br label
+   gtu	   >	   jeq +2; jhs label	   jeq +6; jlo +4; br label
 
    4. 4 words -> 2 words and 2 labels
 
-   leu     <=      jeq label; jlo label    jeq +2; jhs +4; br label
-   le      <=      jeq label; jl  label    jeq +2; jge +4; br label
+   leu	   <=	   jeq label; jlo label	   jeq +2; jhs +4; br label
+   le	   <=	   jeq label; jl  label	   jeq +2; jge +4; br label
    =================================================================
 
    codemap for first cases is (labels masked ):
@@ -1538,7 +1538,7 @@ static struct rcodes_s
   int off;			/* Offset from old label for new code.  */
   int ncl;			/* New code length.  */
 } rcode[] =
-{/*                               lab,cdx,bs,off,ncl */
+{/*				  lab,cdx,bs,off,ncl */
   { 0x0000, 0x0000, 0x3c00, 0x0000, 1, 0, 2, 2,	 2},	/* jump */
   { 0x0000, 0x2002, 0x2400, 0x0000, 1, 1, 4, 4,	 2},	/* eq */
   { 0x0000, 0x2402, 0x2000, 0x0000, 1, 1, 4, 4,	 2},	/* ne */
@@ -1551,7 +1551,7 @@ static struct rcodes_s
   { 0x2403, 0x2802, 0x2401, 0x2c00, 2, 2, 4, 6,	 4},	/* gtu */
   { 0x2401, 0x2c02, 0x2400, 0x2800, 3, 2, 4, 6,	 4},	/* leu , 2 labels */
   { 0x2401, 0x2c02, 0x2400, 0x2800, 3, 2, 4, 6,	 4},	/* le  , 2 labels */
-  { 0, 	    0, 	    0, 	    0, 	    0, 0, 0, 0,  0}
+  { 0,	    0,	    0,	    0,	    0, 0, 0, 0,	 0}
 };
 
 /* Return TRUE if a symbol exists at the given address.  */
@@ -1831,7 +1831,7 @@ msp430_elf_relax_section (bfd * abfd, asection * sec,
   Elf_Internal_Rela * internal_relocs;
   Elf_Internal_Rela * irel;
   Elf_Internal_Rela * irelend;
-  bfd_byte *          contents = NULL;
+  bfd_byte *	      contents = NULL;
   Elf_Internal_Sym *  isymbuf = NULL;
 
   /* Assume nothing changes.  */
@@ -1862,12 +1862,12 @@ msp430_elf_relax_section (bfd * abfd, asection * sec,
       bfd_vma symval;
 
       /* If this isn't something that can be relaxed, then ignore
-         this reloc.  */
+	 this reloc.  */
       if (uses_msp430x_relocs (abfd)
-          && ELF32_R_TYPE (irel->r_info) == (int) R_MSP430X_10_PCREL)
+	  && ELF32_R_TYPE (irel->r_info) == (int) R_MSP430X_10_PCREL)
 	;
       else if (! uses_msp430x_relocs (abfd)
-               && ELF32_R_TYPE (irel->r_info) == (int) R_MSP430_10_PCREL)
+	       && ELF32_R_TYPE (irel->r_info) == (int) R_MSP430_10_PCREL)
 	;
       else
 	continue;
@@ -1936,12 +1936,12 @@ msp430_elf_relax_section (bfd * abfd, asection * sec,
 	}
 
       /* For simplicity of coding, we are going to modify the section
-         contents, the section relocs, and the BFD symbol table.  We
-         must tell the rest of the code not to free up this
-         information.  It would be possible to instead create a table
-         of changes which have to be made, as is done in coff-mips.c;
-         that would be more work, but would require less memory when
-         the linker is run.  */
+	 contents, the section relocs, and the BFD symbol table.  We
+	 must tell the rest of the code not to free up this
+	 information.  It would be possible to instead create a table
+	 of changes which have to be made, as is done in coff-mips.c;
+	 that would be more work, but would require less memory when
+	 the linker is run.  */
 
       bfd_signed_vma value = symval;
       int opcode;
@@ -1967,7 +1967,7 @@ msp430_elf_relax_section (bfd * abfd, asection * sec,
 	 into:
 	 J<inv-cond> 1f
 	 BR[A] #label
-	 1:                     */
+	 1:			*/
       switch (opcode & 0xfc00)
 	{
 	case 0x3800: opcode = 0x3402; break; /* Jl  -> Jge +2 */
@@ -1979,10 +1979,10 @@ msp430_elf_relax_section (bfd * abfd, asection * sec,
 	case 0x3000: /* jn    */
 	  /* There is no direct inverse of the Jn insn.
 	     FIXME: we could do this as:
-	        Jn 1f
-	        br 2f
+		Jn 1f
+		br 2f
 	     1: br label
-	     2:                */
+	     2:		       */
 	  continue;
 	default:
 	  /* Not a conditional branch instruction.  */
@@ -2576,15 +2576,15 @@ elf32_msp430_eh_frame_address_size (bfd *abfd,
 #define elf_backend_may_use_rela_p 1
 #define elf_backend_default_use_rela_p 1
 
-#undef  elf_backend_obj_attrs_vendor
+#undef	elf_backend_obj_attrs_vendor
 #define elf_backend_obj_attrs_vendor		"mspabi"
-#undef  elf_backend_obj_attrs_section
+#undef	elf_backend_obj_attrs_section
 #define elf_backend_obj_attrs_section		".MSP430.attributes"
-#undef  elf_backend_obj_attrs_section_type
+#undef	elf_backend_obj_attrs_section_type
 #define elf_backend_obj_attrs_section_type	SHT_MSP430_ATTRIBUTES
-#define elf_backend_section_from_shdr  		elf32_msp430_section_from_shdr
-#define elf_backend_obj_attrs_handle_unknown 	elf32_msp430_obj_attrs_handle_unknown
-#undef  elf_backend_obj_attrs_arg_type
+#define elf_backend_section_from_shdr		elf32_msp430_section_from_shdr
+#define elf_backend_obj_attrs_handle_unknown	elf32_msp430_obj_attrs_handle_unknown
+#undef	elf_backend_obj_attrs_arg_type
 #define elf_backend_obj_attrs_arg_type		elf32_msp430_obj_attrs_arg_type
 #define bfd_elf32_bfd_merge_private_bfd_data	elf32_msp430_merge_private_bfd_data
 #define elf_backend_eh_frame_address_size	elf32_msp430_eh_frame_address_size
@@ -2595,29 +2595,29 @@ elf32_msp430_eh_frame_address_size (bfd *abfd,
 #define ELF_MAXPAGESIZE		4
 #define	ELF_OSABI		ELFOSABI_STANDALONE
 
-#define TARGET_LITTLE_SYM       msp430_elf32_vec
+#define TARGET_LITTLE_SYM	msp430_elf32_vec
 #define TARGET_LITTLE_NAME	"elf32-msp430"
 
-#define elf_info_to_howto	             msp430_info_to_howto_rela
-#define elf_info_to_howto_rel	             NULL
-#define elf_backend_relocate_section         elf32_msp430_relocate_section
-#define elf_backend_check_relocs             elf32_msp430_check_relocs
-#define elf_backend_can_gc_sections          1
+#define elf_info_to_howto		     msp430_info_to_howto_rela
+#define elf_info_to_howto_rel		     NULL
+#define elf_backend_relocate_section	     elf32_msp430_relocate_section
+#define elf_backend_check_relocs	     elf32_msp430_check_relocs
+#define elf_backend_can_gc_sections	     1
 #define elf_backend_final_write_processing   bfd_elf_msp430_final_write_processing
 #define elf_backend_object_p		     elf32_msp430_object_p
 #define bfd_elf32_bfd_relax_section	     msp430_elf_relax_section
 #define bfd_elf32_bfd_is_target_special_symbol	msp430_elf_is_target_special_symbol
 
-#undef  elf32_bed
+#undef	elf32_bed
 #define elf32_bed		elf32_msp430_bed
 
 #include "elf32-target.h"
 
 /* The TI compiler sets the OSABI field to ELFOSABI_NONE.  */
-#undef  TARGET_LITTLE_SYM
-#define TARGET_LITTLE_SYM       msp430_elf32_ti_vec
+#undef	TARGET_LITTLE_SYM
+#define TARGET_LITTLE_SYM	msp430_elf32_ti_vec
 
-#undef  elf32_bed
+#undef	elf32_bed
 #define elf32_bed		elf32_msp430_ti_bed
 
 #undef	ELF_OSABI
@@ -2625,14 +2625,14 @@ elf32_msp430_eh_frame_address_size (bfd *abfd,
 
 static const struct bfd_elf_special_section msp430_ti_elf_special_sections[] =
 {
-  /* prefix, prefix_length,        suffix_len, type,               attributes.  */
+  /* prefix, prefix_length,	   suffix_len, type,		   attributes.  */
   { STRING_COMMA_LEN (".TI.symbol.alias"),  0, SHT_MSP430_SYM_ALIASES, 0 },
   { STRING_COMMA_LEN (".TI.section.flags"), 0, SHT_MSP430_SEC_FLAGS,   0 },
   { STRING_COMMA_LEN ("_TI_build_attrib"),  0, SHT_MSP430_ATTRIBUTES,  0 },
-  { NULL, 0,                                0, 0,                      0 }
+  { NULL, 0,				    0, 0,		       0 }
 };
 
-#undef  elf_backend_special_sections
-#define elf_backend_special_sections 		msp430_ti_elf_special_sections
+#undef	elf_backend_special_sections
+#define elf_backend_special_sections		msp430_ti_elf_special_sections
 
 #include "elf32-target.h"